Issue 36, 2012

Organic–inorganic nanohybrid nonvolatile memory transistors for flexible electronics

Abstract

We report on a low-temperature fabrication of organic–inorganic nanohybrid nonvolatile memory transistors using molecular layer deposition combined with atomic layer deposition. A 3 nm ZnO:Cu charge trap layer is sandwiched between 6 nm tunneling and 20 nm blocking self-assembled organic layers. First, we identify a large memory window of 14.1 V operated at ±15 V using metal–oxide–semiconductor capacitors. Second, we apply the capacitor structure to the nonvolatile memory transistors which operate in the low voltage range of −1 to 3 V. The writing/erasing (+8 V/−12 V) current ratio of ∼103 of the memory transistors is maintained during the static and dynamic retention measurements. The reported organic–inorganic devices offer new opportunities to develop low-voltage-driven flexible memory electronics fabricated at low temperatures.

Graphical abstract: Organic–inorganic nanohybrid nonvolatile memory transistors for flexible electronics

Article information

Article type
Paper
Submitted
02 May 2012
Accepted
13 Jul 2012
First published
10 Aug 2012

J. Mater. Chem., 2012,22, 19007-19013

Organic–inorganic nanohybrid nonvolatile memory transistors for flexible electronics

K. S. Han, Y. Park, G. Han, B. H. Lee, K. H. Lee, D. H. Son, S. Im and M. M. Sung, J. Mater. Chem., 2012, 22, 19007 DOI: 10.1039/C2JM32767H

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