Low-voltage self-assembled indium tin oxide thin-film transistors gated by microporous SiO2 treated by H3PO4

Abstract

Ultralow-voltage (0.8 V) thin-film transistors (TFTs) using self-assembled indium-tin-oxide (ITO) as the semiconducting layer and microporous SiO₂ immersed in 5% H₃PO₄ for 30 minutes with huge electric-double-layer (EDL) capacitance as the gate dielectric are fabricated at room temperature. The huge EDL specific capacitance is 8.2 μF cm⁻² at 20 Hz, and about 0.7 μF cm⁻² even at 1 MHz. Both enhancement mode (V_th = 0.15 V) and depletion mode (V_th = −0.26 V) operation are realized by controlling the thickness of the self-assembled ITO semiconducting layer. Electrical characteristics with the equivalent field-effect mobility of 65.4 cm² V⁻¹ s⁻¹, current on/off ratio of 2 × 10⁶, and subthreshold swing of 80 mV per decade are demonstrated, which are promising for fast-switching and low-power electronics on temperature-sensitive substrates.