Fabrication and electrical properties of printed three-dimensional integrated carbon nanotube PMOS inverters on flexible substrates

Abstract

The low resolution of current printing technology (usually 10–100 μm) limits the number of printed thin film transistors (TFTs) per processable area, resulting in the low integration of printed circuits. In this work, we developed a three-dimensional (3D) integration technology to increase the integration of printed TFTs and firstly achieved printed 3D single-walled carbon nanotube (SWCNT) PMOS inverter arrays on the flexible substrates. The flexible 3D PMOS inverter consists of a bottom-gate SWCNT TFT (i.e., a driving TFT) and a top-gate SWCNT TFT (i.e., a load TFT). Printed SWCNT TFTs exhibited good electrical properties with high carrier mobility (up to 9.53 cm² V⁻¹ s⁻¹), high I_on/I_off ratio (10⁵–10⁶), low hysteresis, and small subthreshold swing (SS) (70–80 mV dec⁻¹). As-prepared 3D PMOS inverters exhibited rail-to-rail voltage output characteristics, high voltage gain (10) at a low operating voltage (V_DD < 1 V), and good mechanical flexibility. Furthermore, the printed 3D PMOS inverters could be utilized to detect ammonia gases, exhibiting satisfactory stability and recovery rate. It is crucial for realizing high-density, multi-functional printed carbon-based electronic devices and circuits for wearable electronics and the Internet of Things (IoT).