Francesca Leonardi,
Adrián Tamayo,
Stefano Casalini‡
and
Marta Mas-Torrent*
Institut de Ciència de Materials de Barcelona (ICMAB-CSIC), Networking Research Center on Bioengineering, Biomaterials and Nanomedicine (CIBER-BBN), Campus de la Universitat Autònoma de Barcelona, Cerdanyola, E-08193 Barcelona, Spain. E-mail: mmas@icmab.es
First published on 2nd August 2018
Understanding the physics behind the operational mechanism of Electrolyte-Gated Organic Field-Effect Transistors (EGOFETs) is of paramount importance for the correct interpretation of the device response. Here, we report the systematic functionalization of the gate electrode of an EGOFET with self-assembled monolayers with a variety of dipolar moments showing that both the chemical nature and the monolayer density influence the electrical characteristics of the device.
Organic Field-Effect Transistors (OFETs) are not an exception. In these devices, an organic semiconductor (OSC) deposited on a dielectric is brought into contact with two electrodes (i.e., source and drain). Then, by the application of an electric field along the dielectric (i.e., gate-source voltage, VGS) combined with a longitudinal electric field (i.e. drain-source voltage, VDS) the conductivity along the first OSC molecular monolayers close to the dielectric is modulated. Hence, these devices are highly sensitive to both the OSC/electrode and OSC/dielectric interfaces.1,2 Consequently, different strategies have been devised to modify such interfaces in order to tune and optimize the final device performance. Among them, the surface modification by means of self-assembled monolayers (SAMs) represents a valuable and widely explored route in organic electronics due to its versatility and simplicity.3,4
SAMs have been grown on the oxide dielectric in OFETs mainly to reduce the charge trapping that is typically induced by the surface –OH groups,5 to control the OSC crystal growth,6 to tune the surface wettability,7 which is crucial for the deposition of OSCs from solution, to modify the density and nature of the charge carriers8,9 and to implement additional functionalities such as switchable systems.10,11 Many efforts have also been focused on the modification of the source/drain (S/D) electrodes. For instance, SAMs on the S/D can tune the electrode–OSC interaction leading to changes in the nucleation and growth of the OSC deposited on top.12–16 However, SAMs on the S/D have mainly been exploited to improve the device contact resistance. The metals functionalization using SAMs featuring different dipole moments impacts directly on their work function (φm).17 In this way, a better alignment of φm with the organic semiconductor energy levels can be achieved ensuring a more efficient charge injection.18
The φm of the gate electrode has also a clear impact on the device characteristics since it determines the flat band potential, which is, in turn, related to the threshold voltage (Vth). Hence, a linear dependence between φm and Vth has been previously observed in devices wherein different gate metals have been employed.19 However, due to configuration restrictions, the tuning of the gate electrode work function employing SAMs is not viable in conventional OFETs. On the contrary, Electrolyte-Gated Organic Field-Effect Transistors (EGOFETs) open the way towards the gate functionalization, as already demonstrated for the development of biosensors.26–28 These electronic devices employ an electrolyte media as dielectric, where the gate contact is immersed.20,21 The application of a VGS leads to the formation of two electrical double layers (EDLs) at the OSC/electrolyte and electrolyte/gate interfaces, which determine the device capacitance. EGOFETs or water-gated FETs employing different gate metals have also been investigated, observing in most of the cases a shifting of the device Vth as a function of the metal φm but exhibiting clear deviations from linearity.22–25
Here, mimicking the commonly used strategy of modifying S/D electrodes deploying SAMs with a range of dipole moments to tune their work function, we have modified the Au gate electrode of flexible EGOFETs. A coplanar gate electrode has been employed which has been systematically modified by means of a series of thiolated SAMs bearing different terminal groups. Interestingly, and oppositely to what it was previously found in devices where the gate metal was modified, we did not observe a clear correlation between the modification of the metal work function with the SAMs and the device performance, but instead, the changes in capacitance played a crucial role..
Dextran (from Leuconostoc mesenteroides MW = 64.000–76.000) was purchased from Sigma-Aldrich and used without further treatments. Kapton® foils were purchased from DuPont (Kapton®HN, 75 μm thick) and cleaned with acetone and isopropanol before use.
DBTTF:PS blend was coated on Kapton® substrates through Bar-Assisted Meniscus Shearing (BAMS) technique at a speed of 1 cm s−1 and keeping temperature plate equal to 105 °C. As confirmed by XRD analysis, the crystalline thin-film is dominated by DBTTF γ-phase (see Fig. S1†).29,30
Semiconductor patterning was achieved by first drop casting a dextran solution (10 mg ml−1 in water) on the gate region and letting it dry for 10 minutes. Afterwards, the DBTTF:PS blend thin film was deposited as previously mentioned. Subsequently, the device was gently rinsed with water to allow the complete removal of the dextran sacrificial layer, exposing hence the gate electrode and leaving unaltered the OSC thin-film.
Self-Assembled Monolayers (SAMs) were deposited onto gate electrode by means of a PDMS-assisted printing. A 5 × 5 mm2 PDMS stamp with 2 μl of solution containing the self-assembling molecules was printed on the gate electrode for 2 minutes and subsequently rinsed with MilliQ water. For the growth of the SAMs on gold disks and on the gold slides employed for contact angle measurements, a 1 mM solution in ethanol of the target molecule was prepared and the electrode (Ø = 1.6 mm) or the gold substrate (1 cm2) was immersed in it overnight.
I–V transfer characteristics (IDS vs. VGS) were recorded in linear regime keeping the drain voltage equal to −0.1 V and the transistor electrical parameters were extracted from the characteristic curves.
Electrochemical characterization was carried out with NOVO control equipped with a POT/GAL 30 V/2 A electrochemical interface. SAMs quality was evaluated through Electrochemical Impedance Spectroscopy (EIS) in a standard three-electrode configuration, where Pt and Ag/AgCl act as counter and reference electrodes, respectively, and the SAM coated-gold represents the working electrode.
AC amplitude was fixed to 5 mV and the corresponding DC voltage to 0.4 V in order to monitor the monolayer behavior in the ON state of the device, i.e. VGS = 0.4 V.
Optical microscope images were taken using the Olympus BX51 equipped with polarizer and analyser.
X-ray diffraction measurements were carried out with a PANalytical X'Pert Pro MRD (Materials Research Diffractometer) diffractometer. The used Cu K-alpha radiation was 1.54187 Å.
Kelvin Probe Force Microscopy (KPFM) data were obtained with a 5500LS SPM from Agilent Technologies in amplitude mode by applying an AC voltage (VAC) plus a DC voltage (VDC) to the sample. All the measurements were recorded with a gold tip with except for the NH2-terminated SAMs where a Pt one was employed. The CPD values extracted for each SAM have been compared with a reference gold substrate.
EGOFET parameters have been extracted according to the equation in linear regime:
(1) |
Assuming a constant OSC mobility, the change in capacitance caused by the gate electrode modification has been estimated by evaluating the product of the device mobility by the dielectric capacitance before and after the functionalization:
(2) |
Fig. 1 shows the EGOFET configuration. Prior to the OSC deposition, the S/D electrodes were photolithographically patterned as well as the coplanar gate electrode placed 2 mm far from the channel area in order to facilitate the gate functionalization. This distance is appropriate considering the fast cations/anions diffusion.34 Aiming to avoid polarization drawbacks, the gate area is the double of the conductive channel, namely 0.02 cm2.
As previously mentioned, the coplanar configuration demands for the selective deposition of our semiconducting blend solely onto source and drain electrodes, thereby keeping clear the gate one. In order to do that, we made use here of sacrificial layers. These polymeric coatings offer many advantages such as low-cost processing and an extreme versatility of deposition.35 Among these sacrificial layers, the sub-class of water-soluble polymers have been already used for micromachining processes,36 as nano-adhesive plaster37 and in thin-film transistor technology.38 In our particular case, a dextran-based coating was employed to protect efficiently the gate electrode during DBTTF:PS deposition. Afterwards, the polymer was lifted-off in bi-distilled water. This way of patterning is extremely appealing, because it gets rid of organic solvents, which can easily damage the OSC thin-film. The whole process is schematized in Fig. 1a and the final device architecture is shown in Fig. 1b and c.
The proper patterning of the DBTTF-based thin-film has been easily verified by optical microscope, whose images show the gate electrode free of semiconductor, as displayed in Fig. S2b (ESI†). The DBTTF-based coating shows high homogeneity and crystallinity with plate-like crystalline domains. The thin film on Kapton® resembles the thin film structure obtained on silicon oxide substrates, where the γ polymorph of DBTTF is present.30 As a result, the XRD peak centered at 6.55° is the typical fingerprint for γ-phase (Fig. S1 ESI†), which is kinetically favored compared to the α-phase.30 Furthermore, the whole manufacturing has negligible effects on gold features, in fact root mean square roughness, σrms, is comparable with untreated gold electrode (Fig. S2c and e†). Moreover, thin film coating seems to smooth source and drain surfaces and the organic coating appears as a compact thin layer. An opposite scenario takes place in the channel region, where σrms raises up after the thin film deposition (Fig. S2e and f†).
The electrical performances of the coplanar configuration have been compared with the staggered one using a top Au disk placed in the electrolytic medium. As depicted in Fig. 1d, the off current as well as the leakage one (IGS) is lower in the coplanar configuration with respect to the top gate. The two electrical performances are very similar, even though a slight less positive switch on voltage is observed in the coplanar configuration. These slight differences are ascribed to the different polycrystalline Au surfaces and to geometrical discrepancies between the coplanar and staggered configurations. The transfer and output characteristic recorded in saturation regime (VDS = −0.4 V) are reported in Fig. S3.† Furthermore, a shelf-stability test, reported in Fig. S4,† demonstrated the robustness of the EGOFET even after one month. Despite of the weak amplification (namely ON/OFF ratio around 2), these devices show good mobility of the order 0.03 cm2 V−1 s−1, with an average value settled just one order of magnitude lower than its bottom gate/bottom contact counterpart.
Fig. 2 (a) Schematic diagram of PDMS-assisted printing of self-assembled monolayers. (b) Molecular structure of the SAMs subject of this study. |
Concerning the functionalization of the coplanar gate, the geometrical constrains of the chip along with the harmful effect of organic solvent in direct contact with the organic semiconductor did not allow us to proceed with the conventional solution immersion protocol. Thus, as alternative approach, we employed the “PDMS-assisted printing” (see Fig. 2a and the Experimental section).
Contact angle measurements are one of the most exploited techniques to distinguish the hydrophilic/hydrophobic character of a SAM coated surface. As depicted in Fig. 3a, the wettability behavior of the SAMs can be grouped into three regions: (i) more hydrophilic surfaces (i.e., lower contact angle values) than the bare Au, namely the ones coated by AUT, MHD and ATP, (ii) surfaces comparable to the bare Au, such as the ones coated by MeTP and FTP that likely have a low surface organization and packing and (iii) more hydrophobic surfaces (i.e., higher contact angle values), namely the ones coated by 1DT and PFDT.
As mentioned, the interface dipole created by the SAM can cause an increase or decrease of the metal work function, which is directly related to the length of the backbone chain and to the nature of the terminal group. For example, Boudinet et al. reported that gold work function can be shifted with SAMs of ATP, MeTP and PFDT by 0.11, 0.47 and −0.69 eV, respectively.39 Here, we studied by Kelvin Probe Force Microscopy our series of SAMs printed on gold slides in order to estimate the modulation of the gold work function induced by the chemical modification. In Fig. 3b, φm shifts are reported for each SAM. As expected, according to the chemical nature of each molecule, i.e. the electron withdrawing or electron donating character of the SAM's head group, we observed a positive φm shift with 1DT, MeTP, AUT and ATP, whilst the opposite tendency was found with the SAMs of FTP and PFDT. Carboxylic-terminated SAMs represent a particular class, because the interface dipole can be modulated according to the length of the backbone chain.40 In the present case, MHD is long enough to behave similarly to a normal alkanethiol. However, KPFM data show a response similar to FTP and PFDT, which could be due to a poor monolayer ordering. It should be noted that these measurements are performed in air and it is well-known that the metal work function is altered in water environment.20,41
The SAM-modified surfaces were also characterized by means of electrochemical impedance spectroscopy (EIS) (Fig. S5†). From these data, it is possible to extract the double layer capacitance (Cdl). As previously reported,42 Cdl diminishes with respect to bare gold (17.2 μF cm−2) for each SAM (Fig. 3c), proving that our functionalization protocol is effective. As expected, the Cdl decrease is more pronounced in the case of the longest and more compact SAMs, namely AUT, 1DT, PFDT.
The transfer characteristics measured for all the devices using different SAMs are shown in Fig. S6.† It is clearly observed that Vth changes are occurring for each SAM functionalization. The upper panels of Fig. 4 represent the threshold voltage shift (ΔVth = Vth(SAM) − Vth(ref)) of the functionalized devices with respect to the ones measured with the reference bare gold electrode. Notice that the SAMs in the plots are ordered from lower to higher work function. Comparing Fig. 4a and b, it can be noted that although the absolute values found for the two EGOFET configurations are different, the general ΔVth trend is rather similar. These discrepancies can be ascribed to the different way of gate functionalization (viz. PDMS-printing versus immersion in the SAM solution) as well as the different morphology of the Au electrodes. In theory, it should be expected the Vth scales with the metal gate work function. However, not an obvious tendency whatsoever is found in this case. For instance, the long SAMs 1DT and PFDT should have an opposite effect on Vth, but, surprisingly, they promote the same significant ΔVth, particularly in the EGOFET configuration where a gold disk is employed and the SAMs should be more packed. In fact, with the exception of the amino-terminated SAMs, the rest tend to shift positively the threshold voltage or to keep it close to the Au reference value.
Fig. 4 Threshold voltage shifts extracted from transfer characteristic in linear regime (VDS = −0.1 V) and the corresponding capacitance shifts calculated according to eqn (2); The EGOFETs are measured by means of (a) and (c) the planar gate functionalized with SAMs by PDMS-assisted printing and (b) and (d) by using a gold disk electrode functionalized with a standard protocol. |
Regarding the amino-terminated SAMs, the modification of the gate electrode through the PDMS stamp strongly impacts on the electrical transistor characteristic and a drastic decrease in Vth is observed. In the case of AUT, this effect could be probably ascribed to poor layer compactness which permits the protonation of the amino groups and increases the polarization of the gate surface. On the contrary, once this SAM is prepared on the disk electrode, a denser monolayer packing probably is expected to impede the protonation due to stronger electrostatic repulsions resulting in a lower ΔVth. The scenario is different for ATP; the short length of this molecule does not allow the formation of a compact monolayer and the effect on Vth remains comparable despite the employed SAM preparation technique.43
The plot of ISD vs. VGS extracted from all the devices in the linear regime (VSD = −0.1 V) undoubtedly reveals that, in addition to the Vth shift, the slope is also changing in all these devices. The slope in these plots is proportional to the product of the device mobility by the dielectric capacitance (i.e., μC). From the initial electrical data recorded with the bare gate electrode, the device mobility was calculated for each device as previously reported, having always an average value of 0.03 (±0.02) cm2 V−1·s−1.31 Considering then that the mobility of the OSC keeps constant, we can estimate the device capacitance in the devices with the functionalized gate electrode. In the bottom panels of Fig. 4, the capacitance shifts with respect to the devices with bare gold are plotted for each SAM (ΔC = CSAM − Cref). As observed, the SAMs cause a significant impact on the dielectric capacitance (i.e., the electrical double layers). In fact, there is a decrease of the capacitance, with the exception of the printed fluorinated SAMs, FTP and PFDT, which could be ascribed to a lower molecular coverage permitting an enhanced diffusion of ions through the SAM. Noticeable though, the capacitance decrease is quite remarkable for the PFDT and 1DT SAMs on the gate gold disk EGOFETs, again indicating the high density of these SAMs.
The change in the dielectric capacitance of a device influences the Vth. In a transistor with a lower capacitance dielectric, the application of a higher VGS will be required to create the same electric field than the one achieved in a device with a larger dielectric capacitance. In the reported experiments, we believe that the tuning of the devices electrical properties and their Vth with the SAMs are mainly caused by how the SAMs affect the formation of the electrical double layers and, hence, how the total dielectric capacitance is modified. Most of the SAMs on the gate electrode lead to a decrease on the device capacitance, which concomitant increases the device Vth. However, other factors such as the packing of the SAMs and their polarizability are also crucial in order to understand the final device response.
Footnotes |
† Electronic supplementary information (ESI) available: X-ray, optical images and additional electrical characterization data. See DOI: 10.1039/c8ra05300f |
‡ Present address: University of Strasbourg, CNRS, ISIS UMR 7006, 8 allée Gaspard Monge, F-67000 Strasbourg, France. |
This journal is © The Royal Society of Chemistry 2018 |