Bong Ho
Kim
a,
Song-hyeon
Kuk
a,
Seong Kwang
Kim
a,
Joon Pyo
Kim
a,
Dae-Myeong
Geum
a,
Seung-Hyub
Baek
b and
Sang Hyeon
Kim
*a
aSchool of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), 34141 Daejeon, Republic of Korea. E-mail: shkim.ee@kaist.ac.kr
bElectronic Materials Research Center, Korea Institute of Science and Technology (KIST), 02792 Seoul, Republic of Korea
First published on 16th August 2022
HfO2-based ferroelectric (FE) materials have emerged as a promising material for non-volatile memory applications because of remanent polarization, scalability of thickness below 10 nm, and compatibility with complementary metal–oxide–semiconductor technology. However, in the metal/FE/insulator/semiconductor, it is difficult to improve switching voltage (Vsw), endurance, and retention properties due to the interfacial layer (IL), which inevitably grows during the fabrication. Here, we proposed and demonstrated oxygen scavenging to reduce the IL thickness in an HfZrOx-based capacitor and the thinner IL was confirmed by cross-sectional transmission electron microscopy. Vsw of a capacitor with scavenging decreased by 18% and the same Pr could be obtained at a lower voltage than a capacitor without scavenging. In addition, excellent endurance properties up to 106 cycles were achieved. We believe oxygen scavenging has great potential for future HfZrOx-based memory device applications.
However, when stacking FE films on Si substrates, the metal/FE/insulator/semiconductor (MFIS) structure is formed due to the native interfacial SiOx layer (IL) on the Si substrate. Even if the IL is removed in the pre-treatment step, the IL inevitably regrows due to the heat accompanied by the subsequent deposition and annealing process. On the other hand, the IL plays a critical role in the FE behavior, for example, inducing a large amount of charge trapping,16,17 causing most of the voltage drop in the IL between the gate electrode and Si channel due to its lower dielectric constant (∼3.9),18 and destabilizing the polarization state by forming a depolarization field.18,19 As a result, the IL degrades overall performance metrics of FE-based devices such as Pr, switching voltage (Vsw), endurance, and retention.20 However, the existence of IL does not have only detrimental effects. The IL can reduce leakage current,21 induce charge-assisted polarization,17,22 and improve the crystallinity of the FE film.23 These complex roles of the IL impose the difficulty of directly stacking FE films on Si substrates.24 Although the inevitably formed IL is extremely challenging to deal with, it is important to control the MFIS structure for the FE film to be integrated into the gate stack of the field-effect-transistor (FET) with the channel region of the underlying Si. Ultimately, by engineering the IL, the FE film in the MFIS structure will be able to mitigate the aforementioned issues, resulting in significant improvement of the performance metrics.
On the other hand, the HZO thickness scaling directly leads to a reduction in Vsw, and improvement of endurance properties due to reduced voltage that reduces the energy of flowing electrons and the damage to HZO without IL thickness scaling, but the decrease in HZO thickness shows a fundamental trade-off of an increase in annealing temperature and a decrease in ferroelectric phase stability.25 In addition, as the HZO thickness decreases, Pr decreases because domain wall switching becomes difficult due to the smaller grain size.26 Therefore, IL engineering without loss in Pr and stability is required for one of the promising engineering directions. First, the insertion of an additional IL improved Pr and the endurance properties but not Vsw.27 In contrast, reducing the IL thickness using microwave annealing that provides a lower thermal budget than conventional rapid thermal annealing (RTA) lowered Vsw but did not effectively inhibit IL formation during annealing, and the Pr was less than 5 μC cm−2.28,29 Alternatively, the improvement of endurance and retention properties by intentionally forming high-k IL of SiON instead of SiO2 using a high-temperature nitridation30,31 and by using an epitaxial SiGe substrate that forms less IL compared to the Si substrate32 has been reported. Moreover, oxygen scavenging, examined in high-k/metal gate technology to reduce or eliminate IL, was conducted for IL scaling in the MFM structure,33,34 MFIS structure,35 and template layer,36 but the effect on endurance and retention properties of MFIS structure is still unclear.
In this paper, we demonstrated the successful remote oxygen scavenging of HZO-based capacitors, highlighting the significant enhancement of FE properties. We fabricated capacitors of Au/TiN/HZO/Si (without scavenging) and Au/Ti/TiN/HZO/Si (with scavenging) stack and achieved successful IL thickness reduction by remote oxygen scavenging using Ti metal without increasing the process temperature, which was manifested by cross-section transmission electron microscopy (TEM). The capacitor with scavenging exhibited much lower Vsw and higher Pr at the same pulse amplitude than the control capacitor without scavenging. Furthermore, the capacitor with scavenging showed improved endurance properties, exhibiting Pr higher than 10 μC cm−2 without breakdown up to 106 cycles at a pulse amplitude of 4 V and frequency of 10 kHz (4 V/10 kHz), while the capacitor without scavenging exhibited Pr higher than 10 μC cm−2 up to only 103 cycles. The retention properties of the capacitor with scavenging were superior to those of the capacitor without scavenging, and 10 year retention was also verified by extrapolation. We believe that oxygen scavenging is a potential technique for FE devices with low Vsw, high Pr, and excellent endurance and retention properties.
Electrical properties of devices were measured by using a parameter analyzer (Keithley, 4200A-SCS) with a pulse measurement unit (Keithley, 4225-PMU) and remote preamplifier/switch modules (Keithley, 4225-RPM). Pulse measurement schemes are presented in Fig. S2.† Fig. S2a† shows a typical polarization-voltage (P–V) hysteresis measurement using a bipolar triangular pulse and was used for switching voltage (Vsw) extraction. Fig. S2b† shows a positive-up-negative-down (PUND) method using double pulses, which separates polarization and capacitive charging by subtracting the current measured in the first pulse (P and N) and the second pulse (U and D). Endurance and retention tests were performed as shown in Fig. S2c and d.†
Therefore, to ultimately reduce the IL at the interface between HZO and Si, we explored remote scavenging using Ti based on the reaction shown in Fig. 1b. Since Ti is thermodynamically favored to decompose SiO2 considering Gibbs free energy (Fig. 1b),38 we aimed remote oxygen scavenging by introducing Ti on a thin TiN electrode in the gate stack. TiN was used as a barrier layer to prevent Ti diffusion, the intermixing between Ti and HZO, and the capping effect to obtain the ferroelectric orthorhombic phase. Au was used as a capping layer to prevent external oxygen penetration during PMA from the atmosphere. To investigate the effect of oxygen scavenging, we fabricated Au/TiN/HZO/Si (without scavenging) and Au/Ti/TiN/HZO/Si (with scavenging) capacitors following the fabrication flow depicted in Fig. 1c and details are in the Experimental section. As shown in cross-sectional TEM images of Fig. 2a–c, we successfully reduced dIL without process temperature increase by oxygen scavenging with Ti metal. The dIL of the as-deposited capacitor was 0.7 nm despite removal by the buffered oxide etchant in the pre-treatment. Then, after PMA, the dIL increased to 1 nm in the capacitor without scavenging and remarkably decreased to 0.3 nm in the capacitor with scavenging, indicating that the IL re-grew and was scavenged by PMA, respectively. Consequently, according to the voltage drop distribution in Fig. S1a,† in the capacitor without scavenging, a voltage of 43% and 57% will be applied to the IL and HZO, respectively. In the capacitor with scavenging, the VIL will be reduced to 19%.
Meanwhile, the fast Fourier transform images shown in the insets of Fig. 2a–c reveal that PMA induced not only oxygen scavenging but also crystallization from the amorphous structure to poly-crystalline orthorhombic phase. The interplanar distance of 0.307 nm also matches well with the o(111) plane.39 For further structural analysis of HZO after PMA, GIXRD and XPS were performed. As shown in Fig. 2d, GIXRD peaks appeared at 30.8 and 35.5° only in w/o scavenging and scavenged HZO, implying that the amorphous structure of as-deposited HZO was transformed into a mixture of orthorhombic and tetragonal phases after PMA.40 In the XPS spectra of Hf 4f and Zr 3d binding energy levels shown in Fig. 2e, the Hf 4f7/2 and Zr 3d5/2 peaks appeared at 17.7 and 183.1 eV with peak differences of 1.71 and 2.43 eV, respectively, as previously reported in HZO films.41 Note that TEM, GIXRD, and XPS analyses showed no significant structural differences between the HZO film w/o scavenging and with scavenging. This is because HZO films are dominantly affected by the tensile stress induced by the top and bottom electrodes, in particular, the latter,42 but both electrodes of our HZO films were the same as TiN and highly doped n-Si. Therefore, it can be considered that the difference in electrical and FE properties to be discovered in device measurement in the following section mainly originates from the difference in the dIL.
Fig. 3b, I–V curves of capacitors without and with scavenging with the bipolar triangular pulse to the gate (Fig. S2b†), shows Vsw clearly. At a pulse of 4 V/1 kHz, capacitors without and with scavenging exhibited Vsw of 3.43 and 2.80 V, respectively, which means that Vsw was reduced by 16% by oxygen scavenging. According to the voltage drop distribution, VHZO at Vsw of capacitors without and with scavenging is 2.35 and 2.09 V, which is about 12% different. This is because the voltage drop distribution dominates the ferroelectric switching behavior but other factors such as charge-assisted polarization also play a role.22 Therefore, the EIL of the capacitor with scavenging at Vsw, which was the same as that of the capacitor without scavenging when only the voltage drop distribution is considered in Fig. S1b,† will be slightly higher than that of the capacitor without scavenging. But since the charge-assisted polarization is less in the capacitor with scavenging, the damage caused by trapping will be also less, and further measurements are required to compare reliability properties. The leakage characteristics of the capacitor with scavenging shown in I–V curves (Fig. 3b) will also affect the reliability. In other words, as the IL became thinner by oxygen scavenging, Vsw and charge trapping decreased while EIL and leakage increased. Nevertheless, it should be noted that the capacitor with scavenging can exhibit the same Pr as the capacitor without scavenging at a lower pulse amplitude, which can compensate the increased EIL and leakage.
In order to investigate the effect of oxygen scavenging on the reliability of HZO-based capacitors, the endurance test was carried out (Fig. S2c†). Bipolar triangular pulses with an amplitude of 3 to 6 V and a frequency of 1 to 100 kHz were applied, and Pr extracted from the PUND method and endurance properties of capacitors without and with scavenging were mapped in Fig. 4. Fig. 4a and b mapped the Pr of capacitors without and with scavenging, but only Pr over 10 μC cm−2 (minimum Pr for MW to saturate in the FEFET)43 was displayed in color. Attributed to the much reduced Vsw of the capacitor with scavenging, the Pr map of the capacitor with scavenging shifted to a lower voltage than that of the capacitor without scavenging. Additionally, in both capacitors, higher amplitudes were required to obtain the same level of Pr at higher frequencies. On the endurance map in Fig. 4c–f, boundaries indicating initial Pr of 10 and 30 μC cm−2 derived from Fig. 4a and b were overlaid by black and white dashed lines, respectively. First, Fig. 4c and d are maps of the endurance cycles until breakdown occurred. The regions where breakdown did not occur until 106 cycles were marked by black solid lines. Note that although only 106 cycles are displayed for visibility of maps, breakdown did not occur until 109 cycles for the capacitors without and with scavenging at the pulses of 4.5 V/100 kHz and 3.5 V/100 kHz, respectively. Interestingly, this region tended to occur at initial Pr below 30 μC cm−2. For a multifaceted analysis of endurance properties, the endurance cycles until Pr reached 10 μC cm−2 were mapped in Fig. 4e and f because in device operation, maintaining Pr effectively is as important as breakdown not occurring. The regions in which Pr was maintained over 10 μC cm−2 until 106 cycles were also marked by black solid lines, and the regions spanned the lines with an initial Pr of 30 μC cm−2. Analysis of Pr and endurance maps showed that both capacitors exhibited high endurance properties, maintaining Pr over 10 μC cm−2 without breakdown until 106 cycles at moderate pulses. Otherwise, in specific pulses, the capacitor with scavenging showed superior endurance properties to the capacitor without scavenging due to the lowered Vsw. For instance, at 3.5 V/10 kHz, where capacitors without scavenging did not exhibit an initial Pr exceeding 10 μC cm−2, the capacitors with scavenging maintained Pr over 10 μC cm−2 until 106 cycles. At 4 V/10 kHz, capacitors without and with scavenging showed 103 and 106 cycles maintaining Pr over 10 μC cm−2. At 4.5 V/10 kHz, the capacitors without scavenging finally reached 106 cycles.
However, since both capacitors have different Vsw, we compare endurance properties based on the initial Pr rather than the applied pulse. The endurance properties until breakdown occurred and Pr decreased to 10 μC cm−2 according to initial Pr are shown in Fig. S6.† In both capacitors, breakdown did not occur up to 106 cycles at initial Pr below 30 μC cm−2 regardless of pulse frequency (Fig. S6a†). However, at lower initial Pr, Pr reached 10 μC cm−2 in earlier cycling (Fig. S6b†). The endurance measurement results according to initial Pr suggest that oxygen scavenging can effectively lower the Vsw while maintaining Pr without deteriorating the endurance properties of the HZO-based capacitors.
The endurance test proved that the endurance properties of the capacitor with scavenging were comparable to or even better than those of the capacitor without scavenging. As mentioned above, this is because Vsw and charge trapping decreased despite the increase in EIL and leakage by oxygen scavenging. Analysis of initial internal fields (Eint) and XPS can verify decreased charge trapping in the capacitor with scavenging. Referring to the imprint effect of the P–V curves in Fig. S7,† the Eint of the capacitors without and with scavenging was 0.277 and 0.385 MV cm−1, respectively, at a pulse of 6 V/10 kHz. The Eint can be readily calculated as the average of positive and negative Vsw. Since the direction of Eint is opposite to that of the P–V curve shift, the negative shift of the P–V curve is consistent with the direction of Eint from the top electrode to the bottom electrode. The Eint is formed inside the FE materials by the difference in the work function between the top electrode and the bottom electrode,44 the difference in the areal density of oxygen atoms at the interfacial oxide,45 and the asymmetric distribution of oxygen vacancies at the interface.46 However, in our capacitors without and with scavenging, the top electrode and the bottom electrode are the same as TiN and high-doped n-Si and the IL is also the same as SiO2. Thus, it seems that the differences in oxygen vacancy distribution at the top and bottom interfaces of both capacitors lead to different Eint. The sub-oxide peaks of the deconvoluted XPS Hf 4f spectra in Fig. S8† reveal that the existence of oxygen vacancies at the top interface and its density are similar in both capacitors. The fact that the initial Eint of the capacitor with scavenging was higher than that of the capacitor without scavenging suggests that the density of positively charged oxygen vacancies at the bottom interface of the capacitor with scavenging would be less than that of the capacitor without scavenging, which is consistent with the interpretation of charge-assisted polarization in Fig. 3b. The existence of oxygen vacancies at the top interface is because TiN of the top electrode generates oxygen vacancies at the top interface of HZO during the TiN deposition process and PMA.42 On the other hand, as shown in Fig. S7,† the Eint of capacitors without and with scavenging negatively shifted to −1.155 and −0.479 MV cm−1, respectively, after endurance tests of 103 and 102 cycles at 6 V/10 kHz, which means that oxygen vacancies are drastically generated at the bottom interface during cycling. This negative imprint shift indicates the endurance issue due to IL degradation caused by charge trapping in the IL of the MFIS structure.47 In addition, despite the oxygen vacancy distribution differing by 15% between pristine capacitors without and with scavenging, the wake-up and fatigue, a gradual increase and decrease in Pr with cycling, which is a typical phenomenon in ferroelectric HZO, were similar to that shown in Fig. S5.† Since wake-up and fatigue are closely related to domain pining/de-pinning and oxygen vacancy redistribution,48 it is suggested that these phenomena are not significantly different between capacitors without and with scavenging. It was found that oxygen scavenging adversely affected not only endurance properties but also wake-up and fatigue, which are undesirable for the reliability of long-term device operation.
Finally, the retention of Pr was measured for positive and negative poling voltages at room temperature for low-temperature characterization and presented in Fig. 5. The data that were measured by pulses (5 V/10 kHz and 6 V/100 kHz for capacitors without scavenging and 4 V/10 kHz and 5 V/100 kHz for capacitors with scavenging) with similar initial Pr while exhibiting endurance properties of higher than 106 cycles in both capacitors were extrapolated up to 10 years. In positive poling with 5 V/10 kHz and 4 V/10 kHz pulses, the retention properties at 10 years of both capacitors were stable, with Pr exceeding 20 μC cm−2 and maintaining 73 and 87% in capacitors without and with scavenging, respectively. In contrast, retention was not only relatively unstable in negative poling, but there was also a large gap between capacitors without and with scavenging. The Pr of capacitors without scavenging decreased to 22 and 17% and was less than 10 μC cm−2 at 10 year retention extrapolation in negative poling with 5 V/10 kHz and 6 V/100 kHz pulses while capacitors with scavenging showed Pr over 10 μC cm−2 and kept it at 55 and 37% at 4 V/10 kHz and 5 V/100 kHz. The unstable retention characteristics in negative poling are due to electron trapping that occurs in positive pulses. In the typical MFIS structure, the behavior of electrons and holes is asymmetric. As a large amount of electrons (∼1014 cm−2)43 trapped in positive pulses are gradually detrapped according to the retention time,17 the retention characteristics of Pr become unstable. Therefore, the superior retention characteristics of capacitors with scavenging over capacitors without scavenging are attributed to the lower depolarization field54 and less charge trapping owing to the thinner IL.
Fig. 6 Uniformity maps of (a), (b) Vsw and (c), (d) Pr of capacitors without and with scavenging. 25 capacitors for each were measured in an area of 1 × 1 cm2. |
Furthermore, the benchmark in Table 1 highlights the low-voltage operation and high endurance properties of our capacitors with scavenging. In the MFIS structure, we achieved a high Pr of 28 μC cm−2 and endurance properties of >106 cycles maintaining Pr higher than 10 μC cm−2 at a pulse of 4 V/10 kHz with annealing at a low temperature of 500 °C via oxygen scavenging. The capacitor with scavenging showed outstanding performances compared to the capacitor without scavenging as well as other previous MFIS structures.32,49–53
This work | 49 | 50 | 51 | 32 | 52 | 53 | ||
---|---|---|---|---|---|---|---|---|
With scavenging | Without scavenging | |||||||
Ferroelectric oxide (thickness [nm]) | HZO (10) | HZO (10) | Al:HfO2 (20) | HZO (20) | HfO2 (10) | HZO (10) | HZO (13) | HZO (10) |
PMA temperature [°C] | 500 | 500 | 900 | 600 | N/A | 500 | 750 | 700 |
Pulse amplitude [V] | 4 | 4 | 10 | 6 | 3 | 4 | 4 | 2 |
Pulse frequency [kHz] | 10 | 10 | N/A | N/A | N/A | 1 | 1 | N/A |
P r [μC cm−2] | 28 | 16 | 40 | 25 | 8 | 35 | 45 | N/A |
Endurance until breakdown [cycles] | >106 | >106 | >104 | >105 | 105 | 106 | 103 | >107 |
Endurance until Pr > 10 μC cm−2 [cycles] | >106 | >103 | >104 | >105 | 0 | 106 | 103 | N/A |
Footnote |
† Electronic supplementary information (ESI) available. See https://doi.org/10.1039/d2na00533f |
This journal is © The Royal Society of Chemistry 2022 |