Emergence of material-driven two-dimensional electron gas by thermodynamically robust layers in Al₂O₃/In₂O₃/Al₂O₃ nanolaminate structures

Abstract

In this study, the formation of two-dimensional electron gas (2DEG) at both Al₂O₃ (AO)/In₂O₃ (IO) and reversed IO/AO interfaces was demonstrated, enabling its integration into both channel-first and channel-last processes. While conventional reductive-precursor-driven 2DEG was generated at AO/IO interfaces, material-driven 2DEG was developed at IO/AO with no effect from the fabrication process. An optimized AO/IO nanolaminate showed a mobility of 217.9% (48.6 cm² V⁻¹ s⁻¹) relative to a single IO layer (22.3 cm² V⁻¹ s⁻¹). Angle-resolved X-ray photoelectron spectroscopy confirmed 2DEG formation at both post-deposited IO on AO (post-IO) and AO on pre-deposited IO (pre-IO) interfaces. Hall effect measurement on the nanolaminate reveals that pre-IO and post-IO contribute comparably to the reduction in sheet resistivity. This finding expands the application of 2DEG interfaces beyond the conventional channel-first process, paving the way for back-gated back-end-of-line transistors and 3D hole-channel fill architecture in next-generation devices.

---

Introduction

Two-dimensional electron gas (2DEG) has attracted considerable interest for next-generation electronics owing to its high electron mobility and excellent conductivity, with potential applications in conductive-bridge random access memory (CBRAM)¹ and thin-film transistors (TFTs).^2,3 Early studies of 2DEG focused on single-crystalline LaAlO₃/SrTiO₃, where the “polar catastrophe” induced electronic reconstruction and created a quantized 2DEG.^4,5 Although such systems revealed fascinating physics, their reliance on complex epitaxial growth and crystalline perovskite bottom oxides^6,7 hampers their CMOS application. More recently, atomic layer deposition (ALD)-based oxide heterostructures have emerged as a practical alternative. By depositing an Al₂O₃ (AO) layer on the bottom oxide with a relatively low oxide formation energy (e.g. TiO₂,^3,4 ZnO,^3,8,9 In₂O₃ (IO)¹⁰), the strong reduction chemistry of trimethylaluminum (TMA) facilitates oxygen vacancies (V_O),^8,11 yielding robust 2DEG conduction even on polycrystalline or amorphous bottom oxide conditions. An analogous reduction effect to the bottom oxide layer by an active precursor is often reported in the thin-film ALD process.^12–15 However, this “reduction-process-driven” 2DEG formation generally assumes a channel-first approach (i.e. AO deposition with TMA on top of a pre-formed oxide channel). Emerging three-dimensional (3D) memory technologies require channel-last processes, where oxide channels are deposited after the formation of gate oxide to enable vertical stacking and back-gated designs, such as in 3D NAND hole-channel fill or back-end-of-line (BEOL) TFTs.^16,17 Hence, demonstrating 2DEG formation in a post-deposited oxide channel is crucial for extending 2DEG applications beyond conventional planar or channel-first device architectures.

Among candidate bottom oxides for an ALD-based 2DEG, IO stands out for its high electron mobility, attributed to the superposition of large In 5s orbitals.^18–20 However, bulk IO exhibits abundant oxygen vacancies that act as donors, shifting the threshold voltage (V_th) to highly negative values in TFT applications.^21,22 Strategies to mitigate this issue include reducing the channel thickness^21,23 or doping IO with higher-oxide-dissociation-energy elements (e.g., W or Ga).^24,25 Forming a 2DEG at the IO surface can similarly confine carriers to a sub-nanometer region, enabling effective gate control and inducing a positive V_th shift. With a heteromorphic superlattice structure with intervening amorphous layers, the formation of strain and dangling bonds can be suppressed to achieve enhanced mobility.²⁶

In this study, we experimentally validate 2DEG formation in a post-deposited IO layer (post-IO) on an AO film, demonstrating a channel-last approach for IO/AO interfaces via ALD. Crucially, this post-IO 2DEG arises exclusively from “material-driven” thermodynamic driving forces—specifically, the difference in Gibbs free energy of oxide formation between AO and IO—setting it apart from the conventional TMA-process-based reduction route of pre-deposited IO (pre-IO). Angle-resolved X-ray photoelectron spectroscopy (ARXPS) analysis and band alignment measurement by XPS on the valence band edge confirm 0.3 eV band bending at the IO/AO interface in the post-IO stack. The resulting 2DEG achieves a mobility of 48.6 cm² V⁻¹ s⁻¹, outperforming the 22.3 cm² V⁻¹ s⁻¹ of a single IO layer. Furthermore, stacking multiple IO/AO nanolaminate (NL) 2DEG reveals that both pre-IO and post-IO can effectively tune the mobility. These broaden the scope of 2DEG engineering in oxide-based electronics and suggest new pathways for next-generation 3D memory architectures.

Experimental

IO and AO thin films were deposited on 100 nm SiO₂/Si substrates using a vertical-flow-type atomic layer deposition system (NAINSOL, PEALD system). (3-Dimethylaminopropyl)dimethylindium (DADI) and ozone (O₃, 200 g m⁻³) were used as the In precursor and reactant, respectively, for IO deposition, while TMA and H₂O were used for AO deposition. Both processes followed conventional ALD sequences at 300 °C with a supercycle consisting of alternating precursor and reactant injections, with Ar purges between feeding steps. For IO deposition, the sequence included In precursor injection (3 s), Ar purge (10 s), O₃ injection (5 s), and Ar purge (5 s). The self-limited saturation behavior, growth linearity, and within-4-in-wafer thickness uniformity of the IO ALD process are shown in ESI Fig. S1(a)–(c).† For AO deposition, the cycle involved Al precursor injection (0.5 s), Ar purge (10 s), H₂O injection (1 s), and Ar purge (5 s), which were confirmed as the ALD saturation conditions.

The film thicknesses of IO and AO were measured via ellipsometry (Gaertner Scientific Corporation, L166D). The crystallinity and interface properties of the NL structure were analyzed using transmission electron microscopy (TEM, JEOL, JEM-ARM200F). TEM samples were prepared using a focused ion beam (Thermo Fisher Scientific, Helios 650). Crystallinity was also assessed by grazing incidence X-ray diffraction (GIXRD, SmartLab, MXD10). The surface morphology and roughness of each film were examined by atomic force microscopy (AFM, Park Systems, L3633). Chemical states, oxygen vacancies, valence band offset (VBO), and valence band maximum (VBM) were investigated using ARXPS (Thermo Fisher Scientific, MXP10). To investigate the electrical transport properties of the sample, Hall effect measurements (Ecopia, HEM-3000) were conducted using the van der Pauw (VdP) method. Sheet resistance was also measured via the four-point probe method (AIT, CMT-100A).

Results and discussion

Fig. 1(a) presents a cross-sectional TEM image of a double-stacked NL structure consisting of alternating 5 nm IO/2 nm AO layers covered with an additional 12 nm-thick AO capping layer to protect against damage during TEM sampling. Each layer was flat and continuous, with no formation of voids or hillocks across a wide area. As shown in the enlarged high-resolution image in Fig. 1(b), the IO layers exhibit a clear polycrystalline structure, whereas the AO layers remain amorphous. Moreover, well-defined and sharp interfaces confirm the efficacy of ALD for stacked NL fabrication. A fast Fourier transform (FFT) was applied to the red dashed region in Fig. 1(b) and the result is depicted in Fig. 1(c). The obvious FFT patterns attributed to the (200), (211), (222), (321), (400), and (411) planes of the IO bixbyite phase correspond to the GIXRD results in ESI Fig. S1(d).†

Fig. 1 (a) Cross-sectional TEM image of a double-stacked NL ([2 nm AO/5 nm IO] × 2) with a 12 nm AO capping layer at the top. (b) Enlarged high-resolution TEM image of AO/IO NL, highlighting the crystallized IO layers. (c) FFT patterns of the red marked area of (b), where diffraction spots correspond to bixbyite IO. Surface morphology of (d) IO-terminated and (e) AO-terminated NL.

Fig. 1(d) and (e) show AFM images of the surface for the topmost 5 nm IO- and 2 nm AO-terminated NL, respectively. Both exhibit an RMS roughness of ∼0.1 nm, indicating a smooth surface regardless of the terminating layer, which is consistent with the sharp interfaces in Fig. 1(a) and (b). This low roughness ensures uniform stacking of IO/AO NL and offers a viable design window for 3D device structures.

To confirm the 2DEG formation at the IO/AO interface, ARXPS analysis was performed on a bilayer sample comprising 10 nm IO/10 nm AO on a SiO₂/Si substrate. ARXPS is well suited for probing carrier confinement: at a higher stage angle (e.g. 80°), the measurement is more surface-sensitive, whereas a lower angle (e.g. 0°) captures signals from the deeper layers (∼10 nm). At each angle, the In 3d_5/2 peak was deconvoluted into In–OH, In³⁺, In²⁺, and In¹⁺ components, corresponding to binding energies of 445.2 eV,²⁷ 444.7 eV,²⁸ 444.0 eV,²⁹ and 443.5 eV,³⁰ respectively.

Fig. 2(a) and (b) highlight the deconvolution at 80° (predominantly surface-related) and 0° (deep inside the near IO/AO interface region), respectively. The results of intermediate angles are shown in ESI Fig. S2.† As summarized in Fig. 2(c), the In³⁺ intensity decreases while the In^1+–2+ component increases with decreasing stage angle, suggesting progressive oxygen vacancy (V_O) formation toward the IO/AO interface. The negligible In–OH peak (<0.039) indicates that OH-related effects—previously proposed to enhance mobility at hetero-oxide interfaces by Thimsen³¹—are minimal here. Instead, the dominant mechanism of conducting region formation in post-IO appears to be V_O driven. To confirm the spatial confinement of 2DEG, we extracted the thickness of 2DEG, based on the ARXPS results according to stage angle. The equation is properly adjusted from the previous model³² for the IO/AO system to satisfy:

Fig. 2 In 3d ARXPS spectra of 10 nm IO/10 nm AO stack measured at two angles: (a) 80° and (b) 0°, where a higher stage angle reveals the chemical state of In at the surface. (c) Chemical state of IO with different stage angles in the 10 nm IO/10 nm AO stack. The increasing [In^1+–2+/In³⁺] ratio with decreasing stage angle indicates the formation of 2DEG at the interface of IO/AO, even when IO is deposited after AO. The inset shows a schematic of ARXPS with varying stage angles. (d) Angle-dependent In^1+–2+/In³⁺ intensity ratio obtained through ARXPS curve fitting (dots) and the corresponding fitted curve. The inset figure in (d) shows the delta Gibbs free energy (ΔG) of formation of IO and AO per oxygen atom as a function of temperature.

Details of the derivation process of the equation can be found in ESI Fig. S3.† This model uses the ratio of ARXPS intensities from the reduced In^1+–2+ and fully oxidized In³⁺ states as a function of stage angle, where p represents the volume fraction of reduced In within the 2DEG region, d is the confinement depth of 2DEG, λ_IO is the inelastic mean free path of photoelectrons in IO, and t_IO is total IO thickness (= 10 nm). I_In^1+–2+ and I_In³⁺ are the intensity of In^1+–2+ and In³⁺, respectively, from the XPS peak area with an error bar indicating 30% deviation. Based on the equation, the p-value was fitted to be 0.94, and the calculated d was 3.5 Å, indicating that the carrier distribution is strongly localized near the interface of IO/AO.

The Gibbs free energy of formation of IO and AO per oxygen atom as a function of temperature³³ is shown in Fig. 2(d). It shows that AO provides a more favourable thermodynamic sink for oxygen over the relevant device operation temperature of 0–800 °C, driving oxygen migration from IO into AO and thus creating an interfacial V_O-rich region. This “material-driven” driving force offers a compelling explanation for the observed interfacial redox behavior. This interfacial redox process underpins the observed 2DEG formation at the IO/AO interface, responsible for enhanced carrier transport, which will be discussed later. As our 2DEG formation mechanism is thermodynamically driven, it can potentially be applied to other material combinations, such as AO/ZnO or AO/TiO₂ systems, which exhibit similar oxygen formation energy trends to AO/IO. To investigate the energy band alignment at the IO/AO interface, XPS measurements were performed to extract the VBO. Fig. 3(a) shows the binding energies of In 3d and Al 2p core levels of 15 nm IO, 10 nm IO/5 nm AO, 10 nm IO/5 nm AO, and 15 nm AO films. Fig. 3(b) presents the valence band structures for 15 nm IO and AO films. As the Fermi energy level at the AO/IO interface shifts due to 2DEG formation, the VBO at the heterointerface cannot be obtained directly from VBM values. Instead, it was calculated using the following equation:⁸

where BE denotes the binding energy of the core level indicated by each subscript, and the subscripts to the right of the parentheses denote the sample structure used to examine the corresponding characteristics. 15 nm IO and 15 nm AO were used as the samples for bulk IO and bulk AO, respectively. 10 nm IO and 5 nm AO were used for the IO/AO and AO/IO samples for interface analyses. Using the measured VBM values, VBO at the interface, and reported bandgaps (3.2 eV for IO;¹⁰ 6.7 eV for amorphous AO⁸), the energy band alignment diagram was constructed, as shown in Fig. 3(c).

Fig. 3 XPS analysis for band alignment calculation: (a) Binding energies of In 3d and Al 2p core levels of bulk 15 nm IO, 10 nm IO/5 nm AO, 10 nm AO/5 nm IO, and bulk 15 nm AO. (b) Valence band edge of bulk 15 nm IO and bulk 15 nm AO. (c) Calculated band alignment of post-IO (IO/AO) and pre-IO (AO/IO).

In Fig. 3(c), the conduction band offset (CBO) for bulk IO lies 1.45 eV above the Fermi level, implying relatively low conductivity of bulk IO, probably due to the usage of O₃ during IO ALD. This supports the notion that conductivity of IO/AO structure is dominated by the interface, not the bulk region. At the pre-IO interface, a significant band bending of 0.85 eV was observed, facilitating robust 2DEG formation. Notably, the post-IO interface also exhibits an apparent band bending of 0.3 eV. It was somewhat smaller than the pre-IO region as only the oxide formation energy difference drives V_O exchange, whereas the reduction power of the TMA precursor used in AO ALD in the pre-IO case further enhances 2DEG formation. Nevertheless, this still significant band curvature in the post-IO structure confirms that 2DEG can purely emerge from the material configuration by thermodynamic relation, without heavily relying on ALD-induced reduction.

To evaluate the electrical properties of the NL, Hall effect measurements were performed on a series of samples with varying thicknesses of IO (t_IO) and AO (t_AO), as well as different interface numbers. In Fig. 4(a), mobility was examined for varying t_IO from 5 to 20 nm on 1 nm AO. The mobility nearly remains constant up to 15 nm, confirming that conduction is interface-dominated at lower t_IO, in agreement with the band structure analysis. Beyond 15 nm, relatively insulating bulk IO (with a CBO of 1.45 eV in Fig. 3(c)) begins to significantly contribute, resulting in a decrease in mobility from 23.1 to 20.3 cm² V⁻¹ s⁻¹. This NL, which was fabricated using O₃ with high oxidizing power, exhibits an E_C–E_F value of 1.45 eV, which is somewhat high for conventional semiconducting IO. This increased E_C–E_F is advantageous for minimizing bulk conductivity, thereby enhancing the isolation of the 2DEG and improving its suitability for 2DEG-based device applications.

Fig. 4 Hall mobility measurements of various IO/AO stacked structures. (a) Mobility as a function of IO thickness, where the IO layer was increased from 5 nm to 20 nm in 5 nm steps. (b) Mobility variation with AO thickness, where the IO thickness was fixed at 5 nm. (c) Dependence of mobility on the number of IO/AO interfaces. Resistivity of various ALD-structured IO/AO configurations as a function of (d) IO thickness, (e) AO thickness, (f) number of interfaces.

The polycrystalline nature of InO inherently introduces grain boundaries, which act as both carrier scattering centers and charge trapping sites.³⁴ These effects can suppress the carrier density or mobility of 2DEG, depending on the crystalline state of the oxide. In this aspect, strategies such as grain size optimization³⁵ or co-doping to suppress grain-boundary-related traps³⁶ have proven effective in related oxide systems and represent avenues for further mobility enhancement in our structure.

In Fig. 4(b), with a fixed t_IO of 5 nm, t_AO varied from 0 to 4 nm for double-stacked IO/AO with an AO capping layer of equivalent thickness. For the 0 nm t_AO sample, 1 nm AO was used as the bottom layer to avoid any formation of a new interface configuration. The maximum mobility reaches 217.9% (48.6 cm² V⁻¹ s⁻¹) compared to a single 10 nm IO layer (22.3 cm² V⁻¹ s⁻¹) at t_AO of 2 nm, suggesting optimal 2DEG formation at the interface. As t_AO becomes thicker, its capacitance (C_AO) decreases and thus results in reduced accumulated carrier density, following the equation:³⁷, where n_S is the sheet carrier density, q is elementary charge, and V_bi is the built-in potential generated by the 2DEG. Initially, decreasing carrier density in crystalline 2DEG boosts mobility by reducing carrier–carrier scattering. However, at a larger t_AO (e.g. 4 nm), the 2DEG becomes more spatially extended (less accumulated by low C_AO) and starts to resemble bulk-like conductions, causing mobility to drop. The IO thickness required to form a 2DEG is approximately 5 nm. Below this threshold, the oxygen vacancy concentration becomes insufficient to generate high-density 2DEG carriers, resulting in reduced conductivity measured by the four-point probe method. Compared to amorphous IO, crystalline IO-based 2DEG offers higher conductivity due to its band transport characteristics. Furthermore, crystalline IO provides better 2D carrier confinement, enhancing gate modulation in transistor applications.

While the extracted mobility of 48.6 cm² V⁻¹ s⁻¹ confirms the presence of a 2DEG, it is lower than the values reported in other oxide-based heterostructures.^38–40 This discrepancy arises from the use of O₃ as an ALD oxidant for IO deposition, which limits the formation of oxygen vacancies at the IO/AO interface, an important mechanism for 2DEG. Although weaker oxidants could enhance V_O concentration, they may also increase IO bulk conductivity, hindering the 2D transport in the IO/AO system. Notably, the 217.9% mobility relative to bulk IO still highlights 2DEG formation.

Fig. 4(c) shows the mobility according to the number of interfaces by stacking alternative oxide layers. Notably, mobility enhancement from post-IO (transitioning from 2 to 3 interfaces) was even higher than that of pre-IO (3 to 4 interfaces). This demonstrates that the post-IO configuration can deliver analogous mobility enhancement to the conventional pre-IO approach. Beyond this point (4 to 6 interfaces), the mobility reached the upper limit and did not further increase due to the intrinsic scattering effect of the NL structures. The similar or even smaller mobility improvement by pre-IO compared to post-IO, despite the more certain 2DEG formation in Fig. 3(c), could be affected by the mobility saturation effect by the number of interfaces.

Fig. 4(d)–(f) show the resistivity trends corresponding to Fig. 4(a)–(c), respectively. Naturally, total conductivity includes contributions from both 2DEG and bulk IO. In Fig. 4(d), as t_IO increased from 5 nm to 15 nm, the resistivity decreased, which is primarily attributed to the increased grain size with thickness increase. As grain size increases, grain boundary density decreases, leading to fewer traps that capture carriers. This applies both the bulk IO region and the bottom interface region where the 2DEG is generated. Therefore, the carrier concentration of the sample increased, as shown in ESI Fig. S4(a),† and thus reduced the sheet resistance of the 2DEG. This effect dominates in the moderate thickness range (t_IO < 15 nm), effectively lowering the total resistivity despite the increasing dominator (e.g. t_IO), following the relationship ρ = R_S/t_IO, where ρ is resistivity and R_S is sheet resistance. However, once t_IO reaches >15 nm, the trend reverses-the resistivity increases again. This is not caused by degradation of the 2DEG itself but rather by the saturation of the increasing 2DEG contribution, while the increasing t_IO adds more low-mobility bulk material. This shift marks a transition from interface-dominated transport to a regime where bulk conduction becomes more significant, ultimately increasing the overall resistivity.

Fig. 4(e) shows that an optimal t_AO of 2 nm lowers resistivity via the formation of a robust 2DEG, but a thicker t_AO causes a reduction in interfacial carrier confinement, increasing bulk-defect-related scattering and thus resistivity. The nanolaminate stack of 2 nm AO/5 nm IO/2 nm AO/5 nm IO/2 nm AO exhibits lower resistivity (169.1 μΩ cm) compared to a 15 nm IO/1 nm AO structure (344.1 μΩ cm), despite having equivalent total thickness. In Fig. 4(f), it is noteworthy that both post-IO (2 to 3 interfaces) and pre-IO (3 to 4 interfaces) configurations contribute similarly to the reduction in sheet resistivity, reaffirming that post-IO 2DEG formation can match the performance of pre-IO. Again, the smaller than expected resistivity decrease by pre-IO could be due to the saturation trend, which was similarly seen in Fig. 4(c). The carrier concentration values for each configuration are presented in ESI Fig. S4.†

The resistivity and mobility from nanolaminate stacks in Fig. 4(c) and (f) represent the average transport characteristics of 2DEG channels formed at each AO/IO interface, normalized by the total IO thickness. Given the low bulk conductivity of IO relative to 2DEG, the measured transport characteristics predominantly reflect the contribution of interfacial 2DEG.

Conclusion

In this work, the 2DEG formation at the IO/AO interface was demonstrated using a post-IO approach, expanding beyond the conventional channel-first pre-IO paradigm. Notably, this post-IO 2DEG originates from materials-driven thermodynamic differences in oxide formation energies rather than relying on the ALD precursor-induced reduction. ARXPS confirmed the V_O confinement at the IO/AO interface, while XPS analysis confirmed a 0.3 eV band bending in the IO/AO stack, substantiating the presence of 2DEG without the assistance of the strong reducing power of TMA. Hall effect measurements further supported the effectiveness of post-IO 2DEG, reaching a mobility of 48.6 cm² V⁻¹ s⁻¹, which is 217.9% of that of a 10 nm IO single layer. A systematic variation of IO/AO NL with stacked multiple interfaces elucidated that both post-IO and pre-IO can achieve comparable electrical enhancements, confirming the viability of channel-last 2DEG implementation. Consequently, this study opens new design avenues for hetero-oxide electronics, including 3D memory architectures with monolithic stacking of BEOL TFTs, where the gate oxide may be fabricated prior to active 2DEG, without sacrificing carrier mobility or conductivity.

Author contributions

Kyunghun Lyu: conceptualization, methodology, data curation, formal analysis, investigation, visualization. writing – original draft; Jiyoung Park: validation, visualization; Hyun Jae Lee: validation, supervision, writing – review & editing; Woongkyu Lee: conceptualization, funding acquisition, methodology, project administration, resource, supervision, writing – review & editing.

Data availability

All relevant data supporting this article are included within the manuscript and ESI.†

Conflicts of interest

There are no conflicts to declare.

Acknowledgements

This work was supported by the Technology Innovation Program (RS-2023-00233263, RS-2023-00237002) funded by the Ministry of Trade, Industry & Energy(MOTIE, Korea).

References

1. S. M. Kim, H. J. Kim, H. J. Jung, S. H. Kim, J. Y. Park, T. J. Seok, T. J. Park and S. W. Lee, ACS Appl. Mater. Interfaces, 2019, 11, 30028–30036.
2. C. H. Ahn, K. Senthil, H. K. Cho and S. Y. Lee, Sci. Rep., 2013, 3, 2737.
3. J. H. Choi, T. J. Seok, S. J. Kim, K. S. Dae, J. H. Jang, D. Y. Cho, S. W. Lee and T. J. Park, Adv. Sci., 2024, 12, 2410519.
4. T. J. Seok, Y. Liu, J. H. Choi, H. J. Kim, D. H. Kim, S. M. Kim, J. H. Jang, D. Y. Cho, S. W. Lee and T. J. Park, Chem. Mater., 2020, 32, 7662–7669.
5. M. Behtash, S. Nazir, Y. Wang and K. Yang, Phys. Chem. Chem. Phys., 2016, 18, 6831–6838.
6. S. W. Lee, Y. Liu, J. Heo and R. G. Gordon, Nano Lett., 2012, 12, 4775–4783.
7. Y. Chen and R. J. Green, Adv. Mater. Interfaces, 2019, 6, 1900547.
8. H. J. Lee, T. Moon, S. D. Hyun, S. Kang and C. S. Hwang, Adv. Electron. Mater., 2021, 7, 2000876.
9. X. Zhu, T. Zhang, Y. He, Y. Liu and H. Zhu, Nanoscale, 2023, 15, 12071–12077.
10. S. Y. Lee, J. Kim, A. Park, J. Park and H. Seo, ACS Nano, 2017, 11, 6040–6047.
11. J. Park, H. Eom, S. H. Kim, T. J. Seok, T. J. Park, S. W. Lee and B. Shong, Mater. Today Adv., 2021, 12, 100195.
12. W. Lee, J. H. Han, S. W. Lee, S. Han, W. J. Jeon and C. S. Hwang, J. Mater. Chem., 2012, 22, 15037–15044.
13. W. Lee, J. H. Han, W. Jeon, Y. W. Yoo, S. W. Lee, S. K. Kim, C. H. Ko, C. Lansalot-Matras and C. S. Hwang, Chem. Mater., 2013, 25, 953–961.
14. W. Lee, W. Jeon, C. H. An, M. J. Chung, H. J. Kim, T. Eom, S. M. George, B. K. Park, J. H. Han, C. G. Kim, T. M. Chung, S. W. Lee and C. S. Hwang, Chem. Mater., 2015, 27, 3881–3891.
15. S. H. Kim, W. Lee, C. H. An, D. S. Kwon, D. G. Kim, S. H. Cha, H. J. Kim, T. Eom, S. M. George, B. K. Park, J. H. Han, C. G. Kim, T. M. Chung, S. W. Lee and C. S. Hwang, ACS Appl. Mater. Interfaces, 2018, 10, 41544–41551.
16. M. Si, A. Murray, Z. Lin, J. Andler, J. Li, J. Noh and P. D. Ye, IEEE Trans. Electron Devices, 2021, 68, 3195–3199.
17. E. S. Hwang, J. S. Kim, S. M. Jeon, S. J. Lee, Y. Jang, D. Y. Cho and C. S. Hwang, Nanotechnology, 2018, 29, 155203.
18. H. Y. Kim, E. A. Jung, G. Mun, R. E. Agbenyeke, B. K. Park, J. S. Park, S. U. Son, D. J. Jeon, S. H. K. Park, T. M. Chung and J. H. Han, ACS Appl. Mater. Interfaces, 2016, 8, 26924–26931.
19. N. Mitoma, S. Aikawa, W. Ou-Yang, X. Gao, T. Kizu, M. F. Lin, A. Fujiwara, T. Nabatame and K. Tsukagoshi, Appl. Phys. Lett., 2015, 106, 042106.
20. J. Leppäniemi, O. H. Huttunen, H. Majumdar and A. Alastalo, Adv. Mater., 2015, 27, 7168–7175.
21. H. J. Lee, T. Moon, S. Kang, W. Kim and C. S. Hwang, ACS Appl. Electron. Mater., 2021, 3, 3247–3255.
22. M. Fakhri, H. Johann, P. Görrn and T. Riedl, ACS Appl. Mater. Interfaces, 2012, 4, 4453–4456.
23. J. S. Park, J. K. Jeong, Y. G. Mo, H. D. Kim and C. J. Kim, Appl. Phys. Lett., 2008, 93, 033513.
24. D. B. Ruan, P. T. Liu, K. J. Gan, Y. C. Chiu, C. C. Hsu and S. M. Sze, Appl. Phys. Lett., 2020, 116, 182104.
25. C. Peng, H. He, H. Huang, Y. Shang, Z. Feng, Z. Zhang, C. Wang, B. Zou and L. Xingqiang, Phys. Status Solidi RRL, 2024, 18, 2300457.
26. W. Lee, X. Chen, Q. Shao, S. Il Baik, S. Kim, D. Seidman, M. Bedzyk, V. Dravid, J. B. Ketterson, J. Medvedeva, R. P. H. Chang and M. A. Grayson, Adv. Mater., 2023, 35, 2207927.
27. L. T. Duy, H. Kang, H. C. Shin, S. Han, R. Singh and H. Seo, ACS Appl. Mater. Interfaces, 2021, 13, 59115–59125.
28. A. W. C. Lin, N. R. Armstrong and T. Kuwana, Anal. Chem., 1977, 49, 1228–1235.
29. P. H. Ho, G. Tizzanini, S. Ghosh, W. Di, J. Shao, O. Pajalic, X. Wu, P. P. Paalanen, J. D. Grunwaldt, A. Hellman, A. F. Carlsson and L. Olsson, Energy Fuels, 2024, 38, 5407–5420.
30. Z. Zhou, Z. Wei, J. Zhang, H. Yang, S. Li and P. Gao, Ind. Eng. Chem. Res., 2024, 63, 9026–9037.
31. E. Thimsen, M. Johnson, X. Zhang, A. J. Wagner, K. A. Mkhoyan, U. R. Kortshagen and E. S. Aydil, Nat. Commun., 2014, 5, 5822.
32. M. Sing, G. Berner, K. GoB, A. Muller, A. Ruff, A. Wetscherek, S. Thiel, J. Mannhart and S. A. Pauli, Phys. Rev. Lett., 2009, 102, 176805.
33. HSC Chemistry 6.0, 2006.
34. Y. Magari, W. Yeh, T. Ina and M. Furuta, Nanomaterials, 2022, 12, 2958.
35. J. K. Saha, M. M. Billah, R. N. Bukke, Y. G. Kim, N. N. Mude, A. B. Siddik and J. Jang, IEEE Trans. Electron Devices, 2020, 67, 1021–1026.
36. J. K. Saha, R. N. Bukke and J. Jang, Adv. Electron. Mater., 2020, 6, 2000594.
37. A. Abdulsalam, N. Karumuri and G. Dutta, IEEE Trans. Electron Devices, 2020, 67, 3536–3540.
38. J. K. Saha, M. M. Billah and J. Jang, ACS Appl. Mater. Interfaces, 2021, 13, 37350–37362.
39. W. S. AlGhamdi, A. Fakieh, H. Faber, Y. H. Lin, W. Z. Lin, P. Y. Lu and T. D. Anthopoulos, Appl. Phys. Lett., 2022, 121, 233503.
40. J. K. Saha and J. Jang, ACS Nano, 2024, 18, 30484–30496.

---

Footnote

† Electronic supplementary information (ESI) available. See DOI: https://doi.org/10.1039/d5nr01363a

---