A universal framework for design and manufacture of deterministic lateral displacement chips

Abstract

Despite being a high-resolution separation technique, deterministic lateral displacement (DLD) technology is facing multiple challenges with regard to design, manufacture, and operation of pertinent devices. This work specifically aims at alleviating difficulties associated with design and manufacture of DLD chips. The process of design and production of computer-aided design (CAD) mask layout files that are typically required for computational modeling analysis, optimization, as well as for manufacturing DLD-based micro/nanofluidic chips is complex, time-consuming, and often necessitates a high level of expertise in the field. Herein, we report a universal framework to automate the process of designing DLD and producing layout CAD files for various systems spanning from simply a single DLD unit to complex parallelized DLD structures with/without additional upstream/downstream components, e.g., inlet filter, preload, collection channels, and through-wafer vias. In addition, to the best of our knowledge, for the first time, we adopt imprint lithography (IL) into fabrication process flow to define fine features of parallelized DLD arrays, while avoiding problems in connection with accessibility and cost of advanced photolithography tools. With regard to parallelized DLD architectures, we also report a new fabrication process flow aiming at mitigating the problems related to creating through-silicon vias at high yield. We demonstrate some use cases of our developed design and manufacture framework by designing and fabricating multiple devices to separate microspheres (0.6 μm and 1.3 μm) from aqueous media. We believe that our design automation package offers a user-friendly workflow, significantly alleviating the hurdles associated with design and optimization of DLD structures, while our fabrication process flow can provide an accessible solution to manufacturing micron- and submicron-scale DLD chips. These innovations should enable a larger community to adopt the DLD technology into their research, particularly for lab-on-a-chip applications.

Graphical abstract: A universal framework for design and manufacture of deterministic lateral displacement chips

Supplementary files

Transparent peer review

To support increased transparency, we offer authors the option to publish the peer review history alongside their article.

View this article’s peer review history

Article information

Article type
Paper
Submitted
04 Oct 2024
Accepted
10 Dec 2024
First published
18 Dec 2024

Lab Chip, 2025, Advance Article

A universal framework for design and manufacture of deterministic lateral displacement chips

A. Mehboudi, S. Singhal and S.V. Sreenivasan, Lab Chip, 2025, Advance Article , DOI: 10.1039/D4LC00838C

To request permission to reproduce material from this article, please go to the Copyright Clearance Center request page.

If you are an author contributing to an RSC publication, you do not need to request permission provided correct acknowledgement is given.

If you are the author of this article, you do not need to request permission to reproduce figures and diagrams provided correct acknowledgement is given. If you want to reproduce the whole article in a third-party publication (excluding your thesis/dissertation for which permission is not required) please go to the Copyright Clearance Center request page.

Read more about how to correctly acknowledge RSC content.

Social activity

Spotlight

Advertisements