Effect of channel patterning precision on the performances of vertical OECTs

Abstract

Precise patterning of electronic functional layers is vital for integrated electronics, where high integration density is required. Similarly, for organic electrochemical transistors (OECTs), the patterning precision of the channel layer is essential for device miniaturization, parasitic capacitance reduction, and accurate performance evaluation. Especially, for an emerging OECT architecture, vertical OECT (vOECT), the effect of patterning precision to key device parameters (such as transconductance (gm) and transient time (τ)) remains unclear. Here, controllable patterning of vOECT channel regions is realized by direct laser etching, where 2 – 100 μm margin lengths (lM) are left beyond the vertical channel area. By quantitatively analyzing the impact of margin areas on device performance (including drain currents (ID), gm, and τ, it is found that the larger lM leads to significantly increased ID and gm in both n- and p-type OECTs (106.94% and 61.46% of enhancement of ID as well as 102.92% and 92.59% of gm, in n- and p-type OECTs, respectively, are observed as lM increase), which saturate under lM of ~60 μm. Nevertheless, linearly increasing τ (from hundreds of microseconds to a few milliseconds) is observed with increasing lM, revealing that parasitic capacitance outside the channel would result in longer redox reaction time but not always higher ID and gm. It is revealed that the patterning precision of active layers alters the OECT performances tremendously and can be designed to meet different application requirements (either high amplification capability, high integrating density, or fast response time) in OECT-based electronics.