High current treated-passivated graphene (CTPG) towards stable nanoelectronic and spintronic circuits

Abstract

Achieving enhanced and stable electrical quality of scalable graphene is crucial for practical graphene device applications. Accordingly, encapsulation has emerged as an approach for improving electrical transport in graphene. In this study, we demonstrate high-current treatment of graphene passivated by AlO_x nanofilms as a new means to enhance the electrical quality of graphene for its scalable utilization. Our experiments and electrical measurements on large-scale chemical vapor-deposited (CVD) graphene devices reveal that high-current treatment causes persistent and irreversible de-trapping density in both bare graphene and graphene covered by AlO_x. Strikingly, despite possible interfacial defects in graphene covered with AlO_x, the high-current treatment enhances its carrier mobility by up to 200% in contrast to bare graphene samples, where mobility decreases. Spatially resolved Raman spectroscopy mapping confirms that surface passivation by AlO_x, followed by the current treatment, reduces the number of sp³ defects in graphene. These results suggest that for current treated-passivated graphene (CTPG), the high-current treatment considerably reduces charged impurity and trapped charge densities, thereby reducing Coulomb scattering while mitigating any electromigration of carbon atoms. Our study unveils CTPG as an innovative system for practical utilization in graphene nanoelectronic and spintronic integrated circuits.

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New concepts

Our investigation introduces an innovative methodology of ‘current treated passivated graphene (CTPG)’ within the field of large-scale chemical vapor deposited (CVD) graphene tailored specifically for nanoelectronic and spintronic applications. It addresses the long-standing impediment of ensuring stable electronic transport in graphene by ingeniously integrating high-current treatment with an AlO_x nanofilm passivation layer, leading to enhancements and reliability. A distinctive facet of our work is the new current treatment protocol characterized by incremental steps, yielding a notable reduction in charged impurity density within the confines of AlO_x-passivated graphene. This new approach yields an impressive up to 200% enhancement in carrier mobility. The efficacy of our method is corroborated through Raman spectroscopy, which reveals a marked reduction in sp³ defects at the interface. This innovative framework leverages the dielectric polarization of the AlO_x layer to facilitate impurity displacement, thus concurrently mitigating electromigration while boosting material stability. The prospective influence of our findings on the field of graphene-based electronics and spintronics is important, a significant step toward the realization of enduring, high-quality graphene for diverse applications. The notable scalability and stability demonstrated by our methodology on CVD graphene hold promise for the realistic implementation of nanoelectronic and spintronic devices.

Introduction

Nearly the last two decades of research established graphene as a versatile two-dimensional (2D) material that can serve as a base platform for various nanoelectronic and spintronic applications. Beyond exfoliated flakes, large-scale graphene grown by the chemical vapor deposited (CVD) method has shown a high capability for both electrical and spin transport.¹ Lower production cost and the flexibility to transfer onto desired substrates make commercial CVD graphene an ideal material for field-effect transistors used as chemical sensors^2–5 and terahertz detection,⁶ photodetectors,⁷ and transparent electrodes.^8–11 In addition, graphene is promising for advanced circuits based on memristors,¹² spin valves,^13,14 and spin-torque devices.¹⁵ Despite this multitude of potential applications, realizing scalability with stable, high performance has been a central challenge for the practical use of graphene in electronics and spintronics. Environmental factors, such as moisture, oxygen, and charged impurities, can adversely affect graphene's electrical properties and stability. One approach to addressing this limitation is encapsulation, which involves surrounding graphene with protective layers such as hexagonal boron nitride,^16–20 graphene oxide,^21–23 and polymers.^24–26 The choice of encapsulating material depends on the intended application and the desired properties, such as reducing charge impurity scattering, increasing carrier mobility, and improving the quality of the graphene-substrate interface. These materials typically involve complex fabrication steps, making the encapsulation process difficult, time-consuming, and often not a scalable approach. To overcome this, the deposition of ultrathin metal oxides (MOs) on top of graphene can be a convenient, scalable route to protect graphene with dielectric coverage. Metal oxide layers possess excellent mechanical and unique electrical properties and are essential for electronic and spintronic devices.²⁷ In particular, aluminum oxide (AlO_x) has been widely employed as a gate dielectric, diffusion barrier, and tunnel barrier in such devices, with earlier studies indicating that AlO_x coverage could lead to preserved graphene's electronic structure and carrier mobility.^27,28 Furthermore, the AlO_x coverage on graphene can be realized by simple air oxidation of Al nanofilms deposited by electron beam evaporation, making it highly promising for the passivation of graphene and 2D materials. However, AlO_x passivation could also introduce sp³ defects, induce surface charge transfer doping, and impact carrier mobility in graphene.^29–31 To offset any fabrication-induced defects, high current treatment (∼ few milliamperes) has been reported to improve the mobility of Kish graphene field-effect transistors at low temperatures, attributed to the high current stress-assisted removal of contamination in the graphene lattice.^29,32,33 However, the improvement was moderate and not widely reproduced, as side-effects such as the electromigration of carbon atoms and defects can also lower carrier mobility in graphene, while contaminant re-adsorption can further limit the performance of graphene adversely. Thus, to realize applications of graphene, it is of key significance to achieve a good electrical quality of graphene with simultaneous stability and scalability. Towards this objective, the impact of high current treatment on metal oxide passivated graphene (CTPG) is completely unknown, a concept which we demonstrate and explore here for the first time.

In this paper, we unveil how high-current treatment in graphene passivated with aluminum oxide (AlO_x) can lead to enhanced electrical performance and stability in graphene. Our experiments reveal a decrease in the densities of charged impurities and trapped charges, resulting in a significant enhancement of mobility, in striking contrast to un-passivated or bare graphene, where current treatment consistently decreases carrier mobility. The high current treatment in passivated graphene is seen to reliably reduce interface defects, minimally affecting the morphology of the channel. Due to the scalability of CVD graphene and the methods we applied here, our innovative approach results in a high-current treated-AlO_x passivated graphene (CTPG) platform that presents significant implications for developing graphene electronic and spintronic circuits.

Results and discussions

Device fabrication and electrical measurements

To study the effect of high current treatment, we fabricated multiterminal CVD graphene devices. First, CVD graphene on a highly p-doped Si/SiO₂ substrate (with a top 285 nm thick SiO₂ layer) was patterned into 5 μm wide stripes by photolithography and reactive-ion etching. Electrodes at 10 μm spacing with a TiO_x (0.8 nm)/Co (65 nm)/AlO_x (3 nm) layered structure were fabricated by the e-beam lithography followed by e-beam metal evaporation and metal lift-off. To passivate graphene, an additional layer of the Al (0.8 nm) was deposited on the whole chip by e-beam evaporation and subsequently subjected to oxidation in the open air. Compared to techniques like sputtering and atomic layer deposition, e-beam evaporation is a non-invasive method for metal oxide realization at room temperature, with deposited metal atoms having low kinetic energy. Ultrathin e-beam evaporated Al films can be air oxidized, displaying robust insulating properties as ultrathin tunnel barriers or thick dielectric layers. This method preserves the electrical properties of graphene, including mobility and minimum conductivity.²⁸ Our choice of Al thickness ∼0.8 nm is motivated by the specific goal of using the AlO_x as the top passivation layer that could provide electrical access as a tunnel barrier. The e-beam deposition of the ultrathin ∼ 1 nm of Al and air oxidation undergoes nearly full oxidation of Al₂O₃ (confirmed by X-ray Photoelectron Spectroscopy) with good quality and effective insulating tunnel barrier.^28,34

Fig. 1a shows the schematic of a graphene device with a four-probe configuration for electrical measurements. The current–voltage (IV) characteristics show that both passivated and non-passivated graphene devices could sustain high current densities of ∼10⁸ A cm⁻² (Fig. 1b and c). Note that CVD graphene employed here, despite its grain boundaries, can conduct high-current densities of ∼ 10⁸ A cm⁻² safely.³⁵ For both graphene and graphene covered with AlO_x, four-probe IV characteristics display a linear dependence up to current densities ∼ 10⁸ A cm⁻², beyond which non-linearity sets in due to cumulative heating and enhanced resistance, as observed earlier.³⁵ Knowing these regimes allows for choosing the maximum applicable current (within the ohmic regime) for high-current treatment, avoiding possible deterioration of the graphene lattice in the non-linear regime. For each value of current treatment (CT), we chose 15 minutes of prolonged current passage for our samples, increasing gradually to a maximum current I_max = 2.5 mA in steps of ΔI_t = 0.5 mA for bare graphene channels and I_max = 1.25 mA in steps of ΔI_t = 0.25 mA for graphene covered with AlO_x. In our devices, as shown in Fig. 1a, the current (I) was applied between outer electrodes while monitoring the voltage drop (V) across two inner electrodes as a function of time. In Fig. 1d and e, we show the four-probes graphene sheet resistance for two cleaning (i.e. treatment) cycles for bare graphene and graphene passivated with AlO_x, respectively. Within each cycle, for each current level, the resistance increases due to enhanced Joule heating. Overall, in most of these steps of CT (both in 1st cycle and 2nd cycle), for each level of current, resistance levels drop with time, which indicates clear current-induced changes in graphene channels. The time-dependent trend for oxide-covered graphene also suggests that the underlying effects in CT can be more complex with contacts and interfaces.

Fig. 1 High current treatment experiments: (a) Current treatment scheme of bare graphene and graphene passivated with AlO_x devices and four-probe gate dependence measurement configuration. (b) and (c) Measured four-probe I–V curves up to the high-current electrical breakdown of bare graphene and AlO_x-passivated graphene devices; the dashed line indicates the electrical breakdown current. Graphene sheet resistance as a function of time for two cleaning cycles with increasing applied high-currents for (d) graphene and (e) graphene/AlO_x.

Bare graphene under high-current treatment

In between current-treatment steps, we performed gate-dependent measurements of four-probe channel resistance with varying applied gate voltage (V_G). Fig. 2a shows the impact of the CT on a bare graphene channel. The reference curve for treatment progress is marked as no treatment. Then, graphene was under high current treatment (I_t) from 0.5 mA to 2.5 mA with steps (ΔI_t = 0.5 mA). Between the 15 min CT spells, the gate dependence curves were measured in the range of −95 V to 20 V (Fig. 2a). Apart from obtaining electrical mobility, to gain further insights into the electrical properties of graphene and its high-current treament, we extracted the densities of trapped charge carriers (n_τ) and charged impurities (n_i) from gate-dependent resistance (R_ch–V_G) curves (Fig. S1, ESI†). The analysis reveals a decrease in trapped charge density by 3.5 × 10¹¹ cm⁻², nearly 50% change in the 1st cycle, indicating the effectiveness of the de-trapping of charges due to high current treatment (Fig. 2b). Traps and trapped charges in CVD graphene can exist at grain boundaries, impurities as well as wrinkles, which can impact electrostatic carrier tuning in graphene, and our results show that de-trapping can be done through high-current treatment. The reduction in trapped charges is significant as that creates local variations in the electrical potential, which can impede charge transport across the graphene sheet. In addition, we also found a substantial decrease in charged impurity density from 1.97 × 10¹² cm⁻² to 1.45 × 10¹² cm⁻² (Fig. 2c), which is ∼30%. While previous studies on exfoliated graphene showed a mild improvement in carrier mobility,²⁹ in our study, for bare graphene without any coverage, we observed a gradual deterioration in carrier mobility with each step of cleaning by an overall value of ∼ 10% (Fig. 2d). Note that high current density can dislocate resist impurities and other adatom impurities through possible electromigration, and the same can also happen to carbon lattice atoms near defects and grain boundaries, which could possibly decrease the mobility of charge carriers. Thus, our results show that high current treatment of bare graphene does not necessarily enhance mobility.

Fig. 2 High-current treated-bare graphene: (a) Back-gate measurements in the four-probe configuration: channel resistance (R_ch) as a function of the gate voltage (V_G) measured with 5 μA of applied current. (b) Trapped charge density (n_τ) in graphene with different current treatments (I_t) for two cleaning cycles. (c) Charged impurity density (n_i) in graphene with different current treatments (I_t) for two cleaning cycles. (d) Field-effect mobility (μ) of graphene with different current treatments (I_t) for two cleaning cycles. The value at 0 mA is before the current treatment.

High-current treated-AlO_x passivated graphene (CTPG)

Having discussed the CT of bare graphene, we now focus on the impact of AlO_x coverage on graphene, explored by the high-current treatment of the passivated graphene samples. To ensure the reversible (linear) regime of device operation during current treatment, the current for graphene passivated by AlO_x was chosen to be two times less (I_t from 0.25 to 1.25 mA with ΔI_t = 0.25 mA) than that used for as-fabricated graphene. Note that these values are considered from the device performance of graphene covered with AlO_x (Fig. 1c). Gate dependence curves were measured after each 15-minute cleaning cycle, and it is worth noting that graphene covered with AlO_x initially exhibited p-type doping.²⁸ For this reason, a gate sweep was performed in the range of −30 to 50 V (Fig. 3a). In a manner akin to our bare graphene devices, we utilized R_ch–V_G curves to derive the trapped charge and charged impurity densities, understand the electrical characteristics of AlO_x-passivated graphene and its behavior under high-current treatment conditions (Fig. S2, ESI†).

Fig. 3 High-current treated-AlO_x passivated graphene (CTPG): (a) Back-gate measurements in the four-probes configuration, channel resistance (R_ch) as a function of the gate voltage (V_G) measured with 5 μA of applied current. (b) Trapped charge carrier density (n_τ) in graphene at different current treatments (I_t) for two cleaning cycles. (c) Charged impurity density (n_i) in graphene at different current treatments (I_t) for two cleaning cycles. (d) Field-effect mobility (μ) of graphene at different current treatments (I_t) for two cleaning cycles. The value at 0 mA is the measurement performed before the current treatment.

As displayed in Fig. 3c, our results showed that as-fabricated (without any current treatment) graphene and AlO_x-passivated graphene have different levels of charged impurities 1.97 × 10¹² cm⁻² (Fig. 2c) and 2.7 × 10¹² cm⁻², respectively, with passivated graphene exhibiting nearly 30% higher impurities, which could be due to possible interface sp³ bonding caused by the top AlO_x layer.²⁸ The impact of high current on AlO_x-passivated graphene is particularly interesting due to the intricate interface and the inert dielectric protection of the graphene lattice. Our study found that high current treatment or current induced cleaning (i.e. treatment) for both graphene and passivated graphene led to the same level of charged impurities ∼ 1.8–1.9 × 10¹² cm⁻² (Fig. 3c) after 1st cleaning cycle, indicating that this treatment can effectively reduce the number of charged impurities in both types of graphene devices to a base level. Note that the base level can be linked to the intrinsic charged impurities within the graphene lattice, for example, unsaturated bonds, that cannot be fully dislocated or neutralized, and thus the high current treatment makes the AlO_x-covered graphene saturate to bare graphene charge density. The non-monotonic fluctuation of charged impurities in between individual steps seen in the 2nd cycle could be attributed to a non-linear ion removal process that could possibly occur at hot spots, such as grain boundaries and ripples, pertinent to CVD graphene. Overall, the CT leads to a 32% drop in the impurity density by the end of 2nd cycle. Similarly, this process can effectively reduce the number of charged impurities in the graphene device and subsequently decrease the number of trapped charges from 3 × 10¹¹ cm⁻² to 1.5 × 10¹¹ cm⁻² (Fig. 3b).

Strikingly, we observed a significant enhancement in the mobility of the graphene, which increased by up to 40% and stabilized at 3040 cm² V⁻¹ s⁻¹ upon the first cleaning cycle (Fig. 3d). Similar improvement upon current treatment of AlO_x passivated graphene was reproducibly observed on other devices in separate chips (Fig. S3, ESI†). The striking difference between bare graphene and CTPG devices upon current treatment is displayed in Fig. 4a and b, respectively. As seen here, for all bare graphene devices, the mobility decreased after high-current treatment, while the repeated enhancement in mobility up to a significant ∼ 200% in samples that initially showed low mobility. The observed increase in carrier mobility (Fig. 4b) may be attributed to the removal of impurities and defects from the surface of the graphene, as well as the modification of the underlying AlO_x layer, while also improving the contact between the graphene and metal oxide layer. Additionally, surface contaminants can coalesce into larger ensembles that can be more easily removed under high currents to clean the surface effectively. It is worth noting that our devices, which have a width area of 5 μm, are large enough that any contaminants may be moved toward the edges of the device and excluded from the operation area. These results conclusively suggest that despite fabrication-induced or other interface defects, the carrier mobility in CVD graphene can be significantly enhanced via the current treatment of passivated graphene.

Fig. 4 Impact of current treatment on field-effect mobility: (a) Bare graphene devices and (b) graphene/AlO_x devices before (open symbols) and after current cleaning (filled symbols) with a corresponding change indicated by arrows.

Investigating high-current treatment responses between graphene and passivated graphene has yielded intriguing and distinct insights. At high currents, electromigration involves two competing forces: electron wind and the macroscopic electric field. Drifting electrons transfer momentum to carbon atoms at the grain boundary or defect, causing ion migration when wind forces exceed the electric field.³⁶ However, introducing capping layers can considerably increase the activation energy of the diffusion process, reducing stress-driven diffusion^37,38 and enhancing debonding energy.^39–41 In particular, for graphene, the top rigid AlO_x layer imposes restrictions on the carbon atomic movements, increasing the threshold for electromigration. In addition, dipole polarization at the interface between the conducting layer and dielectric can further impact these effects. The dipole polarization occurring at the graphene/AlO_x interface in a lateral structure under high current stress could lead to increased mobility of charged impurities while keeping the carbon lattice intact. The capacitive coupling between graphene and the dielectric can create a depletion region near the interface. Thus, the increase of debonding energy of carbon atoms and the dipole moment of the dielectric layer could lead to better high-current treatment impact on AlO_x passivated graphene, with high interface electric field assisted preferential removal/isolation of impurities, and significantly enhancing graphene's carrier mobility. On the other hand, bare graphene (with exposed carbon atoms having a relatively lower threshold) is more prone to the electromigration of carbon atoms, which can lead to the observed deterioration of electrical mobility.

Raman-active defect passivation through current treatment on Graphene/AlO_x

To understand the effectiveness of the high current treatment method and possible interface defect reduction, we conducted Raman spectroscopy analysis on both current-treated bare-graphene and graphene/AlO_x samples, comparing them with the untreated channels on the same device for each case (Fig. 5a and d). Confocal Raman spectroscopy maps were obtained at a wavelength of 532 nm to determine the treatment effect by examining the D to G intensities (I_D/I_G) ratio along the channel and verifying the position of the graphene G and 2D peaks (Fig. S4a, ESI†). The intensity maps of the graphene channel reveal the D, G, and 2D peaks to be 1339 ± 2 cm⁻¹, 1586 ± 1 cm⁻¹, and 2681 ± 2 cm⁻¹, respectively. The variation in peak position was not attributed to the channel treatment but to the local doping variation. In the case of bare graphene, the mean intensities ratio of the D to G bands (I_D/I_G ∼ 0.19) and 2D to G (I_2D/I_G ∼1.65) showed no significant change after the current treatment (Fig. 5a and b), indicating that the treatment possesses no effect on the sp³ defects (patterning of graphene by oxygen plasma could lead to edge sp³ defects) present within the channel as well as graphene quality. The Raman map of the graphene/AlO_x channel closely resembled that of the bare-graphene channel, showing similar distributions of the G and 2D peaks before high current treament (Fig. S4b, ESI†). However, the positions of the D, G, and 2D peaks for the passivated graphene were identified as 1337 ± 2 cm⁻¹, 1581 ± 2 cm⁻¹, and 2674 ± 4 cm⁻¹, respectively. The shift in the G peak of the graphene/AlO_x compared to pristine graphene indicates p-doping caused by surface charge transfer doping.²⁸

Fig. 5 Spatially resolved Raman spectroscopy mapping: (a) Bare graphene device and measured position-dependent (b) 2D to G and (c) D to G peak intensities ratios in it with dotted lines corresponding to mean value for untreated and treated regions. (d) Graphene covered with AlO_x device and measured position-dependent (e) 2D to G and (f) D to G peaks intensities ratios with dotted lines corresponding to mean value for untreated and treated regions.

The analysis of the D to G intensity ratio (I_D/I_G) in the passivated graphene channels revealed a different response to the high current treatment (Fig. 5d). While the untreated channel exhibited a uniform cloud of data points similar to pristine graphene with a mean value of ∼ 0.28, the treated channels showed a reduction in the number of defects (Δ ∼ 0.14) and a lower distribution spread. This observation gives a striking signature of the decrease in sp³ Raman active defects with a trend toward a more standardized defect distribution along the channel. Furthermore, the 2D to G intensities ratio (mean value I_2D/I_G ∼ 1.2) is unaffected by current treatment in the passivated samples (Fig. 5c). These results from Raman spectroscopy are consistent with the electrical characterization, which indicated a lower density of charged impurities and an increase in mobility for graphene passivated with AlO_x top layer. Thus, Raman's spectroscopy corroborates that high current treatment significantly affects the reduction of sp³ defects in graphene passivated with AlO_x. Atomic force microscopy and scanning electron microscopy (Fig. S5 and S6, ESI†) show that CTPG was structurally stable, with the root mean square roughness remaining unaltered. Notably, the CTPG involving impurity electromigration is significantly different from the thermal annealing of bare graphene,^42–44 which is generally applied to improving graphene quality, particularly CVD graphene grown on copper upon wet-chemical transfer onto substrates is annealed at 400 °C in argon/H₂ atmosphere to remove PMMA residues. CTPG involves preserving the integrity of graphene, top oxide layer, and contacts, avoiding unnecessary diffusion, and promoting selective removal of impurities. The current treatment in the linear regime (Fig. 1b and c), with efficient heat dissipation, ensures no cumulative heating of graphene. The relatively high resistance at grain boundaries can promote higher Joule heating and can appear as hot spots with an estimated temperature rise of ∼ 10 °C per current density of 10⁸ A cm⁻² observed at the grain boundaries.⁴⁵ However, in the linear regime of CT in our sample, the heat at hot spots is expected to be effectively conducted through the graphene sheet and dissipated into substrate and contacts. Overall, our results confirm that graphene passivated with AlO_x can sustain and reliably respond to high high current treatment, leading to enhanced electrical performance, and thus can emerge as a solution for scalable-stable, good electronic quality graphene systems for practical applications. Note that although CVD graphene has great promise for scalability, compatibility with dry processing methods,⁴⁶ and high-quality electronic and spintronic performance,³⁵ achieving stability has been a core challenge for practical implementation. The increase in charge carrier mobility of CTPG is expected to have useful implications for developing scalable graphene electronic and spintronic device applications.

Conclusion

In summary, we demonstrated that graphene passivated with aluminum oxide (AlO_x), upon subjected to high-current treatment, results in an enhanced electronic quality graphene, with an up to 200% increase in carrier mobility, compared to bare graphene, where the mobility decreases upon high-current treatment. This results from a reduced trapped charge density of 50% and a reduced charge impurity density of 30% in the passivated graphene. We confirm from Raman spectroscopy a decrease in interface sp³ defects of high-current treated-AlO_x passivated graphene (CTPG), in contrast to bare graphene, which does not display any change in agreement with electrical properties. Atomic force microscopy reveals that the AlO_x passivation layer remained structurally stable. In passivated graphene, an oxide layer and interface dielectric polarization can facilitate charged impurity displacement more effectively, while the dielectric layer protects the carbon atoms graphene from electromigration by enhanced debonding and activation energies. Our experiments reveal for the first time that CTPG can emerge as a reliable system for good electronic quality graphene, while the scalability of CVD graphene and the method employed here make our study an important step towards practical graphene nanoelectronic and spintronic applications.

Conflicts of interest

There are no conflicts to declare.

Acknowledgements

We gratefully acknowledge funding from European Research Council Consolidator Grant SPINNER (101002772), Stiftelsen Olle Engkvist Byggmästare (200–0602), Energimyndigheten (48698–1), FLAG-ERA Project MINERVA Swedish Research Council VR (2021-05932), and Formas (2019–01326, 2023-01607). M. V. K. and D. B. thank David Muradas Belinchón and Rahul Sharma for their assistance.

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Footnote

† Electronic supplementary information (ESI) available. See DOI: https://doi.org/10.1039/d3nh00338h

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