A review on diverse streams of interface engineering for organic thin-film transistors

Abstract

Organic thin-film transistors (OTFTs) offer a promising solution for facile, low-cost, and large-area fabrication of electronic circuitry. In the development of OTFTs, interface engineering has been essential for modulating the properties of the interfaces between the semiconductor and gate insulator and between the semiconductor and source–drain electrodes. It is worth noting that advancements in OTFTs have accompanied the dynamic subdivision of the field, with diverse technological streams focused on interface engineering. These streams include interface engineering for conventional OTFTs, memory OTFTs, sensor OTFTs, and others. As the differentiation and progress of interface engineering can, in turn, play a pivotal role in enhancing the applicability of OTFTs, it is informative to discern the diverse technological streams of multidimensional interface engineering. In this review article, we provide a critical overview of interface engineering for OTFTs, highlighting the technological diversity and varied purposes of interface engineering for different OTFT applications. We also explain the principles and mechanisms behind controlling the performance of OTFTs through interface engineering. This review will contribute to building useful insights into the design and improvement of OTFTs, as well as deepening understanding of molecular interactions and charge-carrier behaviours in these devices.

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Jin-Hyuk Kwon

Jin-Hyuk Kwon received his PhD degree in Electronic and Electrical Engineering at Kyungpook National University in 2021. Currently he is a postdoctoral researcher in the Research Institute of Printed Electronics & 3D Printing, Hanbat National University. His research interests focus on interfacial phenomena associated with electronic and molecular behaviours in solution-processed organic and metal oxide-based thin-film transistors.

Min-Hoi Kim

Min-Hoi Kim received his PhD degree in electronic engineering at Seoul National University in 2013. Now he is a professor in the Department of Creative Convergence Engineering, Hanbat National University. His research interests focus on organic and oxide electronic devices including memory and sensor and solution-processes for electronic microfabrication.

Jin-Hyuk Bae

Jin-Hyuk Bae received his PhD degree in electrical engineering from the Seoul National University, Seoul, South Korea, in 2010. From 2010 to 2012, he worked as a Postdoctoral Research Fellow at the Ecole Nationale Superiere des Mines de Saint-Etienne, Gardanne, France. In 2012, he joined the faculty with the School of Electronics Engineering, Kyungpook National University, where he is currently a Professor. His research interests include interfacial engineering and physics of organic based and metal-oxide-based electronic devices and their sensor applications.

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1. Introduction

Over the past several decades, organic thin-film transistors (OTFTs) have sparked widespread interest due to their applicability in flexible or stretchable electronics, ability to be solution-processed, and promising electrical characteristics.^1–5 OTFTs generally refer to TFT devices that utilize organic semiconductors (OSCs) as the active layer. The inherent flexibility of OSCs as a key requirement enables mechanical compatibility between OTFTs and plastic substrates, which has opened the door for various new-concept electronics including wearable components and systems.^6–8 Moreover, the solution processability, which has been instrumental in the progress of printing technologies, is an appealing feature for cost-effective and large-scale circuit production. In order to fully harness the advantages of OTFTs and enable their practical application, the development of techniques aimed at improving the electrical characteristics of OTFTs has been essential. It is worth noting that the recent years have witnessed remarkable achievements in the electrical performance of OTFTs (Table 1).^9–25

Table 1 Exemplary OTFT performances in the recent three years

Organic semiconductor	Mobility (cm^2 V^−1 s^−1)	Threshold voltage (V)	ON/OFF ratio	Ref.
C10-DNTT	18	−0.18	≈10^8	9
C10-DNTT	5.22	−7.7 ± 0.97	≈10^6	10
FM-C4	2.06	−3 to −8	≈10^5	11
Ph-DBA-C8	11.8	−3 to −13	≈10^6	12
DNTT	15.3	4.6	≈10^7	13
C8-BTBT	15.4	≈−7	≈10^9	14
pDFB-TF	5.04	14.1	≈10^5 to ≈10^6	15
C8-BTBT	18.6	−0.11	≈10^6	16
C8-BTBT	7.72	−10.43	≈10^5	17
DPh-DNTT	14	—	≈10^8	18
P(DPP2DT-TT)	12.4	−0.5 ± 0.5	≈10^5	19
P(NDI3DP-Se2)	10.1	0.5 ± 0.5	≈10^5
Fu-F	2.79	7 to 10	≈10^6 to ≈10^7	20
DPh-DNTT	6.4	−23.7 to −29.3	≈10^6 to ≈10^7	21
TDPP-Se	11.02	0 to −10	≈10^6 to ≈10^7	22
PAQM-BT	5.10	−4	≈10^4 to ≈10^5	23
C8-BTBT	9.33	—	≈10^5	24
TIIQ-b16	2.54	16.2 ± 7.23	≈10^5 to ≈10^6	25

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Interface engineering has been a vital approach in the quest to modulate and/or improve the characteristics of various organic electronic devices, including OTFTs, organic light-emitting diodes (OLEDs), and organic photovoltaics (OPVs).^26–35 Interface engineering in OTFTs often focuses on controlling and manipulating the electrical characteristics related to the switching function, while in OLEDs and OPVs, one of the key aspects of interface engineering is maximizing energy conversion for light emission and electricity generation, respectively.^36,37 OTFTs incorporate multiple heterogeneous materials for the constituent layers, each with designed roles, which accompanies the formation of multiple interfaces between them. These interfaces exist as spatial regions where charge carriers can experience intended and/or unintended practical impacts. Hence, an electrical measurement result for OTFTs contains a composite of information on the charge behaviours at the multiple interfaces. In a structural aspect, OTFTs are typically constructed with two primary interfaces: one between the OSC and gate insulator (GI) and the other between the OSC and source–drain (SD) electrodes. Charge carriers pass through the primary interfaces, thereby forming the device current and enabling the device operation. Accordingly, the electrical characteristics of OTFTs strongly depend on the properties of the primary interfaces. Specifically, the dynamics of charge carriers at the primary interfaces determine the electrical characteristics of OTFTs.

The charge-carrier dynamics at the primary interfaces can be modulated by changing the properties of the primary interfaces.^38–40 For OTFTs, interface engineering can be defined as a scientific and technological process that modifies the properties of interfaces to improve the electrical characteristics of OTFTs or introduce specific desired features into them. Interface engineering for OTFTs has adopted numerous methods so far, from selecting suitable materials to applying surface treatments, adding functional layers, or modifying various process conditions.^41–43 As OTFTs are basically electronic devices that rely on the flow of electrons, the ultimate consideration in interface engineering is how charge carriers experience the interfaces. Interface engineering involves specific intrinsic or extrinsic driving forces, which determine the spatial distribution of molecules and the energetic distribution of electronic states. These conditions for molecules and states have a direct association with the effective properties of the primary interfaces that impact charge carriers. Therefore, a sophisticated understanding and utilization of possible driving forces are required for the purpose-based design of interface engineering.

For the ceaseless advancement of OTFTs, it is crucial to not only have a comprehensive understanding of interface engineering but also reach a more systematic understanding. Over time, the field of OTFTs has evolved with divisions into diverse subfields, including memory OTFTs and sensor OTFTs, with each subfield demonstrating high potential. This evolution has been accompanied by the technological diversity of interface engineering for OTFTs. That is, there exist distinct differences in the purpose and focus between the diverse streams of interface engineering. The state of technological diversity can serve as a catalyst for creative convergence and integration between different technologies and areas of knowledge, accelerating the progress of a field. It is thus necessary and useful to recognize the technological diversity of interface engineering and gain knowledge from the diverse streams. However, there is a notable deficiency in the systematic analysis and understanding of the diversified interface engineering for OTFTs.

This review categorizes interface engineering for OTFTs and analyzes each attribute, thereby illuminating its diverse streams. Firstly, the need for interface engineering in OTFTs is discussed in detail. Secondly, theories associated with interface engineering for OTFTs, as well as characterization methods, are summarized. Thirdly, the diverse streams of interface engineering are systematically discussed. Lastly, the review concludes with a summary and perspectives on the future direction of interface engineering for OTFTs.

2. The need for interface engineering

2.1. Impact of interfaces in OTFTs

The fundamental functionality of OTFTs is established by the presence of the primary interfaces between the OSC and GI and between the OSC and SD electrodes. The injection and transport of charge carriers at the primary interfaces are often considered critical for understanding the electrical characteristics of OTFTs. Specifically, a conducting pathway is created at the OSC–GI interface in OTFTs, when the applied gate voltage (V_G) exceeds the threshold voltage (V_th).^44,45 The conducting pathway serves as the channel, facilitating the transport of charge carriers such as electrons and holes. Note that OTFTs, as a subtype of field-effect transistors, contain a capacitor structure consisting of the gate electrode, insulator, and semiconductor. In p-type OSCs, a high concentration of holes is accumulated in the channel region, while in n-type OSCs, a high concentration of electrons is accumulated. Simultaneously, the injection and extraction of charge carriers occur locally at the OSC–SD interface under a potential difference between the source and drain electrodes.⁴⁶ When possible leakages, such as gate current, are sufficiently negligible, the channel current is nearly equal in magnitude to the injection and extraction currents. In brief, the transport of charge carriers takes place at the OSC–GI interface, with charge carriers being injected and extracted at the OSC–SD interface, forming a continuous flow of charge carriers from the source to drain through the channel.

The charge-carrier dynamics at the primary interfaces, namely the injection and transport processes obey (or can be understood through) specific mechanisms. The mechanisms for the charge-carrier dynamics, which can be likened to a clockwork with multiple gears, are complex arrangements of various underlying factors. These factors include the properties of the primary interfaces, as well as the inherent material features, device characteristic parameters, and measurement conditions; moreover, they are correlated with each other. As a result, the properties of the primary interfaces have a significant impact on the electrical characteristics of OTFTs.

2.2. Diversification and significance of interface engineering

Interface engineering has been considered instrumental in the development of OTFTs. The electrical characteristics of OTFTs are shaped by mechanisms for the charge-carrier dynamics at the primary interfaces, i.e., the OSC–GI interface and OSC–SD interface. When the properties of the primary interfaces change, these mechanisms can be modulated or acquire new features. Since it is possible to implement mechanisms tailored to specific purposes, numerous attempts have been made to functionalize OTFTs in a wide variety of forms. It is worth noting that interface engineering has been diversified, opening up new possibilities for OTFTs. Through the diversification of interface engineering, various types of OTFTs, such as conventional OTFTs, memory OTFTs, and sensor OTFTs, have been functionalized and demonstrated.

Methods for controlling the nature of the primary interfaces can be broadly classified as follows: (1) modifying/transforming the constituent layers, (2) modifying/transforming their surfaces, and (3) adding functional materials with various forms into the device. Through these approaches, different types of OTFTs can be implemented and their electrical characteristics can be improved as well. To understand the significance of interface engineering in the field of OTFTs, it is essential to discern the specific purposes and roles of interface engineering in the different OTFT types. The focused role of interface engineering differs depending on the type of OTFT, as each type has distinct functionality and mechanisms. For conventional OTFTs, interface engineering has been focused on enhancing their electrical performance and stability. In addition, for memory OTFTs, interface engineering has played a critical role in attaining clear and stable data states. The critical role of interface engineering for sensor OTFTs has been to enhance the sensitivity and selectivity of the devices for improved sensing capabilities. Interface engineering has contributed to implementing and improving the various functionalities of OTFTs. While the overall OTFT technologies are evolving gradually, the technological details of interface engineering in each area have become increasingly specialized.

3. Relevant theories

3.1. Basic operation mechanism

OTFTs belong to the category of field-effect transistors. For field-effect transistors, the drain currents (I_Ds) in the linear and saturation regimes (I_D,lin and I_D,sat, respectively) have been generally expressed as:⁴⁷where W is the channel width, L is the channel length, μ_lin is the linear mobility, C_i is the GI capacitance, V_D is the drain voltage, and μ_sat is the saturation mobility. Bias conditions for field-effect transistors determine their operating state. The relationship between the bias conditions and I_D is basically explained and quantified by eqn (1) and (2).

3.2. Thermionic emission

Understanding the internal energy barriers experienced by charge carriers has been a crucial part of interface engineering in OTFTs. One key aspect of the charge-carrier injection at the OSC–SD interface has been described through the following equation:^48,49where J_S is the current density through a Schottky diode based on the thermionic emission model, A* is the effective Richardson constant, T is the temperature, Φ_B is the barrier height of the Schottky junction, k is the Boltzmann's constant, q is the elementary charge, V_a is the voltage across the diode, and n is the ideality factor. The junction conductance (g_S), which is given by g_s ≡ ∂J_S/∂V_a, can be written as:^48,49where Φ_B is assumed to be independent of V_a. eqn (4) shows the exponential dependence of g_S on Φ_B, implying that the energetic mismatch between the semiconductor and SD layers needs be minimized to reduce parasitic resistance in TFT structures. Furthermore, the field-enhanced thermionic emission model based on the image-force effect predicts the variability of Φ_B in eqn (3) as follows:^50,51where ΔΦ_B is a variation in Φ_B, E_e is the electric field at the junction edge, ε₀ is the vacuum permittivity, and ε_r is the relative permittivity of the junction. The E_e formed in TFT structures possibly varies according to the bias conditions and depends on the material properties, such as doping concentration. In addition, one aspect of the gate-leakage formation in TFTs is connected to field-enhanced thermionic emission. Structural defects in a GI film with uneven coverage cause its poor insulating tolerance to a gate field due to the significant barrier lowering at the GI surface, which also promotes the tunneling of charge carriers.

3.3. Grain boundary

Grain boundaries in polycrystalline OSCs, forming potential energy barriers, can interfere with charge carriers during the transport process. The Matthiessen's rule assumes that the effective mobility μ_eff in MOSFETs can be written as:⁵²where μ_s is the mobility determined by the scattering mechanism, s. Eqn (6) implies the mobility limitations due to possible scattering events during the charge-carrier transport. As grain boundaries can act as specific scattering elements for charge carriers, the μ_eff is written as:⁵³where μ_G and μ_GB are the carrier mobilities in the grain and grain boundary, respectively. Various extrinsic factors also can lead to the formation of additional scattering mechanisms. In the frame of eqn (7), when grain boundaries interfere with charge carriers, the overall transport capability is degraded. Based on thermionic emission, μ_GB is given as:⁵³where [small nu, Greek, macron] is the electron thermal velocity, l is the length of a grain, and E_b is the barrier height at the grain boundary. eqn (8) indicates that the presence of grain boundaries with larger E_bs decreases the μ_GB, resulting in a lower μ_eff.

The trapping of charge carriers at a grain boundary creates an energy barrier, the height of which can be estimated from:⁵⁴

where n_T, depending on the Fermi level (E_F), is the density of occupied traps at the grain boundary and N_A is the acceptor concentration in the grain. An increase in the extent of molecular disorder at the grain boundaries possibly leads to an increase in the E_b. At small V_Gs, the low position of the E_F relative to the band edge may also cause a large effective E_b. Note that the influence of grain boundaries is manifested in various forms and to different extents, depending on the material properties, device types, and bias conditions.^55,56

3.4. Trapped and free surface charges

The total surface charge (Q_tot) in TFTs, which can be divided into the trapped charge (Q_t) and the free charge (Q_f), is written as:⁵⁷

Q_tot = −C_i(V_G − V_fb) = Q_t + Q_f, (10)

where V_fb is the flat-band voltage. Q_t depends on the trap density of states (DOS), the formation of which is associated with the physicochemical properties of the semiconductor and GI layers. In the case of the memory operation of ferroelectric TFTs, the remanent polarization of the ferroelectric GIs determines the extent of Q_tot, which is also divided into Q_t and Q_f.

To reflect the trapping of charges followed by a reduction in Q_f, and the variability of Q_tot associated with external stimuli, eqn (10) is rewritten as:

Q_tot = Q_t + Q_f = Q_t + (1 − p)(Q_tot,i + ΔQ_tot,i) (11)

where Q_t = p(Q_tot,i + ΔQ_tot,i), p is the trapping ratio (0 < p < 1), and ΔQ_tot,i is a variation in Q_tot,i. In this context, Q_tot,i, as a constant value, represents a specific initial Q_tot. ΔQ_tot,i mainly originates from external stimuli, such as doping-like effects due to ambient molecules, and thermally or field-induced changes in the materials microstructure and internal charge distribution. Furthermore, the trap DOS is classified into shallow and deep traps with the centers located at relatively shallow and deep energy levels, respectively in the bandgap.⁵⁸ Thus, Q_t can be regarded as the sum of shallow trapped charge Q_t,s and deep trapped charge Q_t,d, i.e., .

Since the response of TFTs to various stimuli is a process accompanying the flow of time, it is useful to understand the temporal patterns of change in Q_tot. eqn (11) indicates that Q_tot, as a function of time t, has the following differential relationship:

Eqn (12) is linked to specific aspects of memory and sensor OTFTs, such as a variation in the I_D measured over time, considering the direct association between Q_tot and I_D. The characteristic of the element, ∂ΔQ_tot,i/∂t in eqn (12) is associated with the intensity or frequency of external stimuli. In addition, the energy levels and density of trap states can affect the characteristic of the term, ∂Q_t/∂t,^59–62 which is also correlated with the wavefunction decay properties of possible near-interface trapped charges. In a fast-sweep measurement for a MOSFET, the slow near-interface trap density N_its within the insulator layer can be written as:⁵⁹where E_S = E_V + (E_G/2 − Ψ_B) + Ψ_S, β ≈ Ψ_S⁻¹ ln(I_D/k′), and ψ_S is the surface potential. The N_its formed in a field-effect device can exhibit a time-dependent variation involving thermal emission and tunneling processes,⁶⁰ which is considered undesirable in the context of electrical stability.

In addition, the Landau–Khalatnikov–Tani equation for ferroelectric domains with polarization fluctuations can be written as:⁶³

where m_p, equal to (ε₀ω_p²)⁻¹, is the polarization inertia, ω_p is the plasma frequency, P is the polarization, γ is the damping constant, F is the free energy, and E_th is the Langevin noise field obeying a fluctuation–dissipation theorem. The presence of polarization fluctuations in ferroelectric TFTs may interfere with the transport of the channel carriers,⁶⁴ which in turn modulates the interfacial polarization dynamics, considering the dipole–carrier interaction. Moreover, the interfacial polarization dynamics is likely to induce fluctuations in the Q_tot, considering the direct association between the polarization and the Q_tot.

3.5. Charge transport mechanism

The multiple trapping and release (MTR) model has been frequently utilized to describe the charge-carrier transport in polycrystalline OSCs.⁴⁹ In this model, the charge-carrier transport is assumed to occur through a transport band of extended states, with repeated trapping and thermal release processes through localized trap states under the band edge.⁶⁵ The exponential energy distribution of localized trap states (N_t(E)), which is reflected in the MTR model, is generally expressed by:where N_t0 is the total trap density and T_c is the characteristic temperature indicating the width of the exponential distribution. The exponential distribution is combined with the charge-transport property dependent on V_G. Accordingly, the field-effect mobility (μ_FE) is given by:⁶⁶where N_c is the effective DOS at the band edge. Eqn (16) elucidates the association between the charge transport at the semiconductor–GI interface and the localized trap states.

In addition, the variable-range hopping (VRH) model has been often used for highly disordered OSCs. In this model, hopping of charge carriers between localized states is considered to govern the charge-carrier transport. By combining the conductivity in percolation theory with an exponential energy distribution of localized states, the μ_FE is given as:⁶⁷

where σ₀ is a prefactor, T₀ is a parameter indicating the width of the exponential distribution, α is the effective overlap parameter determining the tunneling process between sites, B_c is the critical number of bonds, and ε_s is the dielectric constant of the semiconductor. The VRH model as well as the MTR model provide a useful and valuable framework for understanding the charge-carrier transport in disordered semiconductors.

The MTR and VRH models may not fully describe the aspects of the temperature dependence of μ_FE. In these models, the Fermi–Dirac distribution is applied to each transport system for quantifying/estimating the filling of localized states. However, when external stimuli such as potential gradients are given to the systems, the charge carriers occupying localized states beneath the mobility edge (or beneath a specific transport energy) are likely to follow an emission-like dynamic process, which depends on temperature as well as the trap energy level. The carrier occupation of localized states defined by the Fermi–Dirac distribution is considered incompatible with the emission-like process that can perturb the equilibrium condition.

4. Characterization methods

4.1. Atomic force microscopy

Atomic force microscopy is a powerful imaging technique employed to visualize and characterize the surface morphological properties of materials.⁶⁸ The electrical characteristics of OTFTs are greatly impacted by the surface morphological properties of the constituent material films, such as grain size, grain boundary density, surface roughness, wetting state, and various structural defects. Note that the interface between materials is simply a direct contact between their surfaces at a structural level. Atomic force microscopy, which is frequently utilized in OTFT research, has played a critical role in quantifying or investigating the correlations between the device characteristics and the surface morphological properties of the materials.⁶⁹

4.2. X-Ray diffraction analysis

X-Ray diffraction is a powerful tool for studying the crystalline properties of materials.⁷⁰ Through the analysis of the obtained X-ray diffraction patterns, it is possible to obtain information such as crystallinity, phase composition/purity, lattice parameters, and atomic/molecular arrangements. X-Ray diffraction is also one of the most frequently utilized analytical techniques in OTFT research, as their electrical characteristics are intimately associated with the crystalline properties of the materials.⁷¹ In particular, the growth of polycrystalline OSC films and their crystalline properties are significantly influenced by the external factors and process conditions, including substrate properties and ambient temperature. Accordingly, X-ray diffraction analysis has been highly instrumental in the development and optimization of OTFT technologies.

4.3. Sum frequency generation spectroscopy

Sum frequency generation spectroscopy is a second-order non-linear optical technique that can yield the vibrational spectra of molecules at an interface.^72,73 The analysis of the vibrational spectra provides information on the molecular conformation, orientation, and disorder at the interface. Investigating structural properties is one of the important tasks in OTFT research. The electrical characteristics of OTFTs are closely correlated with structural properties of the constituent interfaces at the molecular level.^74–76 Hence, sum frequency generation spectroscopy is considered one of the necessary tools for the progress of OTFT technology.

5. Diverse streams of interface engineering

5.1. The purposes of interface engineering in conventional OTFTs

In this text, the term 'conventional OTFTs' refers to the use of OTFTs as a driving element for active-matrix displays, or as a logic-circuit element for radio-frequency identification tags. Interface engineering has played a crucial role for improving the electrical performance and stability of OTFTs. Especially, interface engineering for conventional OTFTs has been evolving to minimize trap states and energy barriers that can interfere with the transport or injection of charge carriers.

5.1.1. Suppression of molecular disorder. The electrical performance of OTFTs is associated with the molecular alignment feature of the OSC thin film, which can act as an important factor for the charge-carrier transport at the OSC–GI interface. The transport capability in OTFTs is usually evaluated by μ_FE.^77,78 Rivnay et al. systematically investigated the effects of molecular alignment on the electrical performance of perylenediimide (PDI8-CN₂) OTFTs.⁷⁹ PDI8-CN₂ films with a slip-stacked molecular structure were grown by employing the method of directional solvent evaporation on a tilted substrate during the solution process. Thorough analyses including the total-energy calculations and X-ray phi-scans were conducted to examine the in-plane packing arrangement of PDI8-CN₂ molecules. They fabricated two types of PDI8-CN₂ OTFTs: 'parallel devices' with the alignment direction of the PDI8-CN₂ film parallel to the channel (Fig. 1a (top)), and ‘perpendicular devices’ with the alignment direction of the PDI8-CN₂ film perpendicular to the channel (Fig. 1a (bottom)). The mobility anisotropy of around 72 was obtained between the parallel and perpendicular devices. The mobility anisotropy property was further investigated based on the temperature dependence (Fig. 1b). In the corresponding calculations, the parallel and perpendicular devices exhibited the activation energies of approximately 125 and 468 meV, respectively. The observed electrical anisotropy was attributed to the presence of grain boundaries in the aligned PDI8-CN₂ film. High-angle grain boundaries with relatively high molecular disorder in the perpendicular devices were considered to hinder the inter-grain transport of charge carriers (Fig. 1c). These results indicate the importance of grain-boundary orientation and molecular-level morphology in the aligned PDI8-CN₂ film. This study contributed to clarifying the importance of grain-boundary engineering for enhancing the mobility of solution-processed OTFTs.

Fig. 1 (a) The optical microscopy of the parallel (top) and perpendicular (bottom) OTFTs with the aligned PDI8-CN₂ thin films, (b) the Arrhenius plots of the temperature-dependent mobilities for the OTFTs, with the blue symbols for the parallel devices and the red symbols for the perpendicular devices, and (c) the schematic diagrams of the proposed grain boundary types in the aligned PDI8-CN₂ thin films. Reproduced from ref. 79 with permission from [Nature Portfolio], copyright [2009]. (d) The schematic diagram of the solution-shearing techniques based on a micropillar blade and (e) the X-ray phi-scan analysis of the reference and single-crystalline TIPS-pentacene thin films. Reproduced from ref. 83 with permission from [Nature Portfolio], copyright [2013].

Since grain boundaries in polycrystalline OSC thin films can act as charge traps and energy barriers,^56,80 it has been essential to develop techniques for controlling the grain-boundary orientation and the molecular alignment feature at the grain boundaries. Various types of driving forces, such as centrifugal forces, electromagnetic waves, thermal gradients, and static magnetic fields, have been used to improve molecular alignment properties in OTFTs.^{29,30,42,81,82}

Diao et al. reported an effective solution-shearing technology for fabricating thin films of 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene) with aligned single-crystalline domains.⁸³ A shearing blade with crescent-shaped patterned micropillars were manufactured (Fig. 1d). The TIPS-pentacene thin film fabricated with the micropillar-patterned region in the blade exhibited a clear reduction in the grain-boundary density, compared to those fabricated with the non-patterned region in the blade. Furthermore, the researchers patterned wetting regions with an asymmetric triangle shape on a substrate in order to control the nucleation of crystalline domains. By combining the methods for controlling the nucleation and growth of crystalline domains, it was possible to achieve the formation of large-area single-crystalline domains in TIPS-pentacene thin films. The aligned TIPS-pentacene thin film with both the controlled nucleation and growth exhibited significantly enhanced crystalline quality, as indicated by the cross-polarized microscopy of the single-crystalline domains. X-Ray phi-scan analyses were performed on the TIPS-pentacene thin films to assess the crystalline quality. The aligned film displayed a relatively small angular spread of 3° in its diffraction pattern, while the reference film had a relatively large value of 60° (Fig. 1e). This confirmed high molecular alignment quality in the single-crystalline domains of the aligned film. OTFTs with the aligned TIPS-pentacene films were fabricated and their electrical characteristics were analyzed. This study demonstrated a useful technical route for large-area printed electronics.

5.1.2. Enhancement of contact properties. Contact resistance at the OSC–SD interface has been regarded as one critical factor that limits the electrical performance of OTFTs.^84–86 The I_D of OTFTs has been modeled with a combination of the contact resistance. The above-threshold I_D (I_above) can be written as:⁸⁷where K = (W/L)C_i, μ_FET = (μ₀/V^γ_aa)|V_G − V_th|^γ (γ is the characteristic mobility exponent), R_C is the contact resistance, λ is the saturation coefficient, α_s is the saturation modulation parameter, and m is the transition parameter. The apparent electrical characteristics of OTFTs can include undesired or unexpected effects arising from the contact resistance. The contact resistance has often made the extraction of a reliable mobility value difficult as well.^47,88

Minari et al. reported a technique for reducing the contact resistance based on the chemical doping of the OSC–SD interface.⁸⁹ Dioctylbenzothienobenzothiophene (C8-BTBT) OTFTs were fabricated and explored (Fig. 2a). Prior to the formation of SD electrodes, iron(III)trichloride (FeCl₃), which is known to be an acceptor material, was slightly evaporated as a dopant onto the C8-BTBT layer. In the electrical tests, the C8-BTBT OTFT with the FeCl₃ doping was found to have electrical performance superior to a reference device without the FeCl₃ doping (Fig. 2b). The contact resistance of the devices was extracted by using the transmission line method, which assumes the equation:

where R_on(L) is the ON resistance, μ_ch is the intrinsic mobility in the channel region, and R_C is the contact resistance. While the reference device exhibited a contact resistance value of 200 kΩ cm at the V_G of −40 V, the FeCl₃-doped device exhibited a significantly reduced value of 8.8 kΩ cm at the V_G of −40 V. To explain the reduction in the contact resistance, they proposed a qualitative model for the charge-injection process at the OSC–SD interface (Fig. 2c). The FeCl₃ doping was considered to reduce the depletion width at the OSC–SD interface and reduce the DOS in the bulk region (Fig. 2c). These results confirmed the effectiveness of FeCl₃ doping for reducing the contact resistance of C8-BTBT OTFTs.

Fig. 2 (a) The schematic diagram of the C8-BTBT OTFTs, (b) the transfer characteristic curves of the device with and without the contact doping, and (c) the energy diagram for a reduction in the Schottky-barrier thickness and the filling of trap states in the bulk region through the contact doping. Reproduced from ref. 89 with permission from [AIP Publishing], copyright [2012]. (d) The schematic diagram of the DPh-DNTT OTFTs, (e) the influence of the gate-insulator thickness on the gate-voltage-dependent contact resistance in the device. Reproduced from ref. 91 with permission from [Nature Portfolio], copyright [2019]. (f) The transfer characteristic curves of the transferred-Pt OTFTs with different channel lengths (left) and the corresponding contact-resistance extraction through the transmission line method (right) and (g) the differential charge density at the interfaces between C10-DNTT and Pt (left) and between C10-DNTT and Au (right) electrodes. Reproduced from ref. 9 with permission from [Nature Portfolio], copyright [2023].

The contact resistance is known to limit the transit frequency of OTFTs as well. The dependence of the transit frequency f_T on the contact resistance can be expressed as:⁹⁰

where R_CW is the width-normalized contact resistance and L_OV,total is the total gate-to-contact overlap. In other words, the large contact resistance can act as a detrimental factor for the high-frequency operation of OTFTs. Borchert et al. demonstrated a low contact resistance of 29 Ω cm in bottom-contact OTFTs built on plastic substrates.⁹¹ They fabricated DPh-DNTT OTFTs with bottom-contact and top-contact structures, with different thicknesses for the GI (Fig. 2d). For the bottom-contact DPh-DNTT OTFTs, the SD electrodes were treated with pentafluorobenzenethiol (PFBT) (Fig. 2d), in order to maintain the better morphological property for the DPh-DNTT layer and improve the injection-barrier property. Grazing incidence X-ray diffraction analyses revealed a better crystalline feature in the DPh-DNTT layer on the PFBT-treated SD, compared to the one on the bare SD, in terms of in-plane π–π stacking. At a relatively small thickness of 3 nm for the GI, the bottom-contact device exhibited prominently lowered contact resistance compared the top-contact device (Fig. 2e). In particular, the bottom-contact DPh-DNTT OTFT demonstrated a smaller contact resistance compared to the top-contact device, even when using plastic substrates. Specifically, the bottom-contact device exhibited a smaller value of 29 Ω cm. The researchers fabricated 11-stage unipolar ring oscillators on plastic substrates. The ring oscillator with the bottom-contact devices exhibited improved signal-propagation delay of 138 ns per stage. Consequently, it was found that the lowered contact resistance in the bottom-contact DPh-DNTT OTFT was relatively beneficial for the dynamic TFT performance. This study provided an experimental demonstration of the small contact resistance in bottom-contact OTFTs, and expanded the technological base for the introduction of OTFTs in high-frequency applications.

Multifaceted efforts have intensely been made to reduce the contact resistance of OTFTs.^92,93 Zeng et al. reported an effective approach to significantly reduce the contact resistance based on an electrode-transfer technique assisted by orbital hybridization.⁹ C10-DNTT OTFTs with transferred Pt SD electrodes were fabricated and explored (Fig. 2f). The transferred-Pt SD C10-DNTT OTFT exhibited the highest current density than those with transferred Au and evaporated Au SD electrodes. The highest current density was attributed to the best contact property between them. A significantly low contact resistance of 14.0 Ω cm was obtained for the transferred-Pt C10-DNTT OTFT (Fig. 2f). Moreover, the transferred-Pt C10-DNTT OTFT possessed improved electrical characteristics in the context of subthreshold swing, ON/OFF ratio, mobility, and V_th. Through density functional theory calculations, it was found that Pt has higher DOS near the HOMO states of C10-DNTT compared to Au. Accordingly, the contact-resistance reduction was attributed to the increased probability of tunneling at the OSC–SD interface. In addition, the Pt-catalyzed dehydrogenation of side alkyl chains, leading to the formation of Pt–C covalent bonds, was considered to promote orbital hybridization at the Pt–OSC interface and reduce the contact resistance, in contrast to the van der Waals gap formed at the Au–OS interface (Fig. 2g). A diode-connected transistor rectifier was successfully implemented using the transferred-Pt C10-DNTT OTFT. The significance of this study lies in proving a new and effective route for improving the contact resistance in OTFTs, aiming to achieve a leap in their electrical performance.

5.1.3. Inhibition of trap-state formation. Another key focus of interface engineering for conventional OTFTs has been improving their electrical stability.⁹⁴ Park et al. proposed a method to enhance the characteristics of the OSC-GI interface in terms of electrical stability by modifying the chemical properties of the semiconductor material.⁹⁵ They synthesized indenofluorenediones with different numbers of fluorine substituents, i.e., TriF-IF-dione, DiF-IF-dione, and MonoF-IF-dione. In the comparison, the TriF-IF-dione OTFT exhibited suppressed shift of the transfer characteristic curve under gate bias stress compared to the DiF-IF-dione and MonoF-IF-dione OTFTs. The electrical stability improvement with respect to gate bias stress was attributed to an increase in the activation energies for trap creation. The TriF-IF-dione OTFT exhibited improved environmental stability as well. This study proved a possible clue for achieving electrically stable OTFTs in terms of material design.

As various intrinsic and extrinsic factors induce electrical instability in OTFTs, it has been essential to address the electrical instability issue through multidimensional approaches based on interface engineering. Bulgarevich et al. developed pBTTT-C16 OTFTs with improved electrical stability using the hydroxyl-free fluoropolymer, CYTOP terminated with amidosilyl functional groups.⁹⁶ They achieved patterning of the CYTOP layers on a silicon dioxide substrate through vacuum ultraviolet (UV) light exposure followed by a development process (Fig. 3a). The CYTOP-treated pBTTT-C16 OTFT exhibited smaller subthreshold swing and reduced current hysteresis than the octadecyltrichlorosilane (ODTS)-treated device. The subthreshold swing improvement and hysteresis suppression in the CYTOP-treated device, implying a reduction in the interfacial trap density, were attributed to an increased quality of the OSC–GI interface. Especially, the electrical stability tests revealed that the electrical stability of the CYTOP-treated pBTTT-C16 OTFT under gate bias stress in vacuum was significantly improved compared to the ODTS-treated device (Fig. 3b). The V_th stability of the devices was analyzed using the equation:

where τ is the trapping time constant and β is the stretching factor. The extracted τ and β values of the CYTOP-treated device were 1 × 10¹² s and 0.28, respectively, while the extracted τ and β values of the ODTS-treated device were 3 × 10⁸ s and 0.26, respectively (Fig. 3b (right)). It was found that the electrical stability of the CYTOP-treated pBTTT-C16 OTFT in vacuum was superior to that of amorphous silicon transistors. These results indicate that intrinsic factors for the electrical instability of OTFTs can be suppressed through surface chemical modification of the GIs.

Fig. 3 (a) The process for fabricating the hydrophobic–hydrophilic patterns on a substrate and (b) the transfer characteristic curves of the CYTOP-incorporated OTFTs obtained with the different bias stress times under vacuum conditions (left) and the threshold-voltage variations of the CYTOP- and ODTS-incorporated OTFTs according to the stress time (right). Reproduced from ref. 96 with permission from [Wiley], copyright [2020]. (c) The schematic diagram of the OTFT device encapsulated with the parylene N and (d) the trap density of states spectra obtained at different times during the device operation for the non-encapsulated (left) and encapsulated (right) devices. Reproduced from ref. 97 with permission from [Nature Portfolio], copyright [2021].

Considering extrinsic factors that can cause detrimental effects on the OSC–GI interface is also crucial for addressing the electrical instability issue of OTFTs. Iqbal et al. proposed an effective methodology for improving the electrical stability of OTFTs based on a sophisticated encapsulation technique.⁹⁷ TnHS BDT trimer OTFTs encapsulated with parylene N were fabricated and explored (Fig. 3c). In particular, they carried out analyses for the trap DOS in the OSC bandgap utilizing the following equation:⁹⁷

where E equal to eV₀ is the trapping-state energy with respect to the E_F, p(V₀) is the total hole density with respect to V₀, and V₀ is the interfacial potential. The researchers examined the variation in trap DOS over time with non-encapsulated devices exposed to ambient air. Especially, after a certain time elapsed, a clear peak at an energy level of 0.31 eV was observed in the DOS spectrum (Fig. 3d (left)), indicating formation of extrinsic trap states in the OSC bandgap. Through density functional theory calculations as well as the trap DOS analyses, they inferred that the OTFTs should be encapsulated with suitable materials that effectively prevent water permeation but allow oxygen permeation. Accordingly, the TnHS BDT trimer OTFTs were encapsulated with parylene N. As a result, the trap-associated peak disappeared in the DOS spectrum (Fig. 3d (right)). The encapsulated device exhibited significantly improved electrical stability compared to non-encapsulated devices. This study provides useful theoretical and experimental insights for understanding the origin of electrical instability and realizing the practical application of OTFTs.

5.2. The purposes of interface engineering in memory OTFTs

Attaining clear and stable data states is one of the key aspects in the development of memory OTFTs. Accordingly, the technological evolution of memory OTFTs has spanned various interface engineering for realizing and improving the non-equilibrium stability of each data state through sophisticated utilization of physical factors, e.g., electric dipoles and charge traps, sensitive to external conditions or stimuli. Ensuring the reversibility of data states is also one of the basic concerns in interface engineering for memory OTFTs.

5.2.1. Stabilization of non-equilibrium polarization. Inserting a buffering layer in ferroelectric OTFTs potentially provides an effective route to suppress polarization fluctuations at the OSC/GI interface and improve their electrical characteristics.⁶⁴ Song et al. developed high-speed memory OTFTs exploiting a poly(methyl methacrylate) (PMMA)-incorporated double-layer structure.⁹⁸ 2D C8-BTBT ferroelectric OTFTs with P(VDF-TrFE) were fabricated and explored. It was mentioned that a high-speed memory can be implemented by using 2D semiconducting molecular crystals. During the solution process of the 2D C8-BTBT layer, the formation of the 2D C8-BTBT layer accompanied the formation of a thin PMMA layer (Fig. 4a), which was enabled by the use of the C8-BTBT/PMMA mixture solution. In particular, phase separation was considered to realize the creation of the C8-BTBT/PMMA double-layer structure on the P(VDF-TrFE layer). The PMMA layer effectively prevented the penetration of C8-BTBT molecules into the P(VDF-TrFE) layer. Consequently, while a reference device without PMMA failed to operate due to the high gate leakage, the explored device with PMMA exhibited the field-effect operation (Fig. 4b). The 2D C8-BTBT memory OTFT with PMMA showed a mobility of 5.6 cm² V⁻¹ s⁻¹, on/off ratio of ∼10⁶ and memory window of ∼12, with the good retention and non-volatile properties. In the delay-time tests, the 2D C8-BTBT memory OTFT with PMMA exhibited a high-speed operation feature. Specifically, the device exhibited delay time of ∼2.9 from ON- to OFF-state and ∼3.0 ms from OFF- to ON-state (Fig. 4c). These results indicate that high-speed memory OTFTs with binary states can be implemented through proper surface modification of ferroelectric GIs.

Fig. 4 (a) The solution processing of the C8-BTBT thin film on the P(VDF-TrFE) thin film, with the PMMA-layer formation, (b) the transfer characteristics curves of the corresponding memory OTFT, and (c) the switching behaviour of the device. Reproduced from ref. 98 with permission from [The American Chemical Society], copyright [2017]. (d) The retention characteristics of the PMMA-incorporated memory OTFTs and the reference device and (e) the noise spectral densities of the corresponding devices. Reproduced from ref. 99 with permission from [AIP Publishing], copyright [2021]. (f) The schematic diagram of the memory OTFT and the chemical structure of the constituent materials and (g) the transfer characteristic curves of the device. Reproduced from ref. 100 with permission from [IEEE-Institute of Electrical and Electronics Engineers Inc.], copyright [2021]. (h) The atomic force microscopy image of the P(VDF-TrFE) thin film formed on the BZT thin film and (i) the transfer characteristic curves of the memory OTFT with the P(VDF-TrFE)/BZT hybrid GI. Reproduced from ref. 101 with permission from [IEEE-Institute of Electrical and Electronics Engineers Inc.], copyright [2022].

In the development of high-performance memory OTFTs, a thorough exploration on intrinsic factors that can affect the interfacial property has been required. Xu et al. reported a technology for achieving high-performance memory OTFTs through the self-organization of dielectric-combined ferroelectric GIs.⁹⁹ They fabricated and explored PDBT-co-TT ferroelectric OTFTs with a top-gate structure. Blended PMMA/P(VDF-TrFE) GIs, obtained via phase separation, were incorporated as the GI. The phase separation method was chosen to avoid the solvent-induced damage of the PMMA buffer layer. The PDBT-co-TT memory OTFT exhibited a hysteresis behaviour in the transfer characteristic, where the 0 and 1 binary states are manifested. The device also exhibited an improved mobility of 1.96 cm² Vs⁻¹ compared to the device with a pure P(VDF-TrFE) GI. The presence of the PMMA buffer layer was considered to suppress the negative impacts of the polarization fluctuation and grain boundaries on the charge-transport property at the OSC-GI interface. Especially, the memory OTFT with the PMMA/P(VDF-TrFE) GI exhibited a significantly improved stable retention over 1.1 × 10⁴ s (Fig. 4d), as well as a reliable endurance property. Furthermore, the researchers carried out analyses on the low-frequency noise (Fig. 4e). The analyses revealed that the device with the PMMA/P(VDF-TrFE) GI had smaller noise spectral densities than the device with the pure P(VDF-TrFE) GI. Accordingly, the mobility improvement was attributed to reductions in the trap density and polarization fluctuation at the OSC-GI interface. This study provided a technological base for the development of high-performance memory OTFTs. Xu et al. also demonstrated a top-gate ferroelectric OTFT with low programming/erasing voltages (Fig. 4f).¹⁰⁰ In their results, while the memory OTFT with a thin P(VDF-TrFE) failed to operate properly because of the large gate leakage, the device with a bilayer PMMA (55 nm)/P(VDF-TrFE) (155 nm) exhibited the suppressed leakage, memory ON/OFF ratio of 10⁴, programming/erasing voltages of ±15 V, average mobility value of 1.01 cm² V⁻¹ s⁻¹, and memory retention over 65 000 s (Fig. 4g).

Charge-carrier transport in OTFTs is associated with dipole alignment properties at the OSC-GI interface. Yang et al. reported an improvement in the dipole alignment feature of a PMMA interlayer through controlling the adsorption process condition.⁷⁵ The improved dipole alignment feature led to an increase in the mobility of an OTFT, which was attributed to a reduction in energy fluctuations at the OSC–GI interface.

Investigation on various materials and structures can be useful for preserving and maximizing the functionality of ferroelectric GIs. Lee et al. proposed a strategy for improving the thin film quality of P(VDF-TrFE) in memory OTFTs.¹⁰¹ Pentacene ferroelectric OTFTs with a P(VDF-TrFE) GI were fabricated and explored. They introduced a barium zirconate titanate (BZT) thin film as the bottom layer for the P(VDF-TrFE) GI in the bottom-gate top-contact device structure. The P(VDF-TrFE) thin film with the BZT bottom layer, i.e., the P(VDF-TrFE)/BZT hybrid thin film showed lower RMS surface roughness than a single P(VDF-TrFE) thin film (Fig. 4h). Specifically, the P(VDF-TrFE)/BZT hybrid thin film exhibited RMS surface roughness under 10 nm, while the single P(VDF-TrFE) thin film exhibited RMS surface roughness of 30 nm. The reduction in surface roughness of the P(VDF-TrFE) thin film was considered desirable for obtaining a better interfacial quality with the OSC layer, lower defect density, and suppressed leakage current. The memory OTFT with the P(VDF-TrFE)/BZT hybrid GI exhibited a large memory window of 7 V (Fig. 4i), with. Moreover, the device had a low operating voltage of ±10 V and a stable retention over 10⁴ s. This study offers useful knowledge on the importance of morphological properties of ferroelectric GIs in memory OTFTs.

5.2.2. Enhancement of non-equilibrium charge trapping. For floating-gate and charge-trap memory OTFTs, it has been essential to enhance and stabilize the charge trapping and storage capability. Shih et al. developed high-performance memory OTFTs, where conjugated polymer nanoparticles were utilized as the electrets.¹⁰² Nano-floating-gate memory OTFTs with a pentacene active layer were fabricated and explored. Polyfluorene (PF) and poly(fluorene-alt-benzo[2,1,3]thiadiazole) (PFBT) polymeric nanoparticles were dispersed into a poly(methacrylic acid) matrix that also acted as a tunneling layer. During the writing and erase processes, the memory OTFT with PF nanoparticles exhibited a controllable V_th property with a memory window of 22.68 V, indicating the trapping and detrapping of electrons in the PF nanoparticles (Fig. 5a). The memory OTFT with the PFBT nanoparticles exhibited a larger memory window of 34.88 V than the device with the PF nanoparticles (Fig. 5b). The improvement of charge storage characteristics was attributed to the larger electron affinity of PFBT compared to that of PF. The researchers also examined the memory OTFTs with a normal polymeric blend of PF and polystyrene as the electret, which was found to be disadvantageous for obtaining a large memory window due to the direct contact of PF with the pentacene layer and the deficiency of crystalline phase. Moreover, compared to the device with the PF-polystyrene blend electret, the device with the PF nanoparticles exhibited a significantly improved retention over 10⁴ s (Fig. 5c). With regard to the improvement of retention characteristics, the PF nanoparticles with a better crystalline property was considered to possess relatively stable energy states for charge storage. These results provide critical knowledge for improving the electrical characteristics of nano-floating-gate memory OTFTs in the context of charge-storage capability.

Fig. 5 (a) The transfer characteristic curves of the memory OTFT with the polymeric nanoparticles, (b) the energy diagram of the proposed charge-trapping mechanism in the device, and (c) the retention characteristics of the memory OTFTs with the various electrets. Reproduced from ref. 102 with permission from [Wiley-VCH Verlag GmbH], copyright [2015]. (d) The energy diagram for the proposed memory mechanism in the memory OTFT with the BPQD, (e) the displacement of the transfer characteristic curve during the programming and erasing operations, and (f) the retention characteristic of the memory OTFT with a tunnelling layer. Reproduced from ref. 103 with permission from [IEEE-Institute of Electrical and Electronics Engineers Inc.], copyright [2020]. (g) The energy diagrams for the memory OTFT with the TPA(PDAF)_n layers under positive gate voltages, (h) the transfer characteristic curves of the TPA(PDAF)₃-based device during the programming and erasing processes, and (i) the retention characteristics of the optimized TPA(PDAF)₃ device. Reproduced from ref. 104 with permission from [Wiley], copyright [2018]. (j) The schematic diagram of the memory OTFT, the chemical structures of TPP-H, TPP-CH₃, and TPP-OCH₃ molecules, and the 3D molecular electrostatic potential contour map of TPP-H, TPP-CH₃, and TPP-OCH₃ molecules, (k) the transfer characteristic curves of the device with the TPP-OCH₃/polystyrene nanoarray after programming and erasing operations, and (l) the retention characteristic of the device. Reproduced from ref. 105 with permission from [The Royal Society of Chemistry], copyright [2022].

Researchers have adopted various materials and structures thereof to enhance the charge-storage capability in memory devices. Kumari et al. demonstrated a nano-floating-gate memory OTFT using black phosphorus quantum dots (BPQD) as the charge-trapping medium.¹⁰³ They fabricated and explored nano-floating-gate memory OTFTs with a PFT-100 active layer. A positive gate pulse led to a positive shift of the transfer characteristic curve by the mechanism shown in Fig. 5d. The memory OTFT with the BPQDs exhibited ON/OFF current ratio of 1.3 × 10⁶ and a memory window of 61.3 V in the programming and erasing processes (Fig. 5e), as well as a good endurance property. The charge-trap density n_t in the BPQD-based memory OTFT was calculated using the following equation:

where ΔV_on is the memory window. The charge-trap density calculation showed that the BPQD-based memory OTFT had a significant charge-storage capacity. However, the device exhibited undesirable decay behaviour during the retention measurement. To solve this problem, the researchers introduced a PMMA tunneling layer in the device structure. Consequently, the BPQD-based memory OTFT exhibited a greatly improved stable retention over 10⁴ s (Fig. 5f), which was attributed to the suppressed leakage of trapped charges in the BPQDs. This study proves a possibility of an effective approach to achieving high-performance memory OTFTs.

The design and synthesis of effective molecules specialized in the charge-trapping capability are one of the essential approaches for achieving high-performance memory OTFTs. Yu et al. demonstrated memory OTFTs based on the incorporation of 4,5-diazafluorene-based donor–acceptor small molecules.¹⁰⁴ They fabricated and explored memory OTFTs with a pentacene active layer. TPA(PDAF)_n (n = 1, 2, 3) were synthesized and utilized as the charge-trapping elements for the memory OTFTs. The TPA(PDAF)_n (n = 1, 2, 3) devices exhibited sufficiently high ON/OFF current ratios of 5.1 × 10⁴, 11.1 × 10⁵, and 3.96 × 10⁴, respectively. Under the negative gate bias (programming), the devices displayed multibit memory windows with a negative V_th shift. The transferred holes were considered to be trapped by the triphenylamine moiety, causing the negative V_th shift. Moreover, in the light-assisted erasing process, the trapped holes were considered to be neutralized by the photo-induced electrons. Under the positive gate bias (light-assisted programming), the TPA(PDAF)₃ device exhibited the largest positive memory window, which was attributed to its lowest LUMO level followed by an increase in the electron transfer from the pentacene layer (Fig. 5g). The transferred electrons were considered to be trapped by the 4,5-diazafluorene moiety. The TPA(PDAF)_n (n = 1, 2, 3) devices had total memory windows of 52, 66, and 89 V, respectively (Fig. 5h). The researchers optimized their memory devices using a polystyrene charge-blocking layer. In the retention tests of the optimized devices, the TPA(PDAF)₃ device exhibited an improved retention property over 10⁴ s with ON/OFF current ratio of over ∼10⁴ level (Fig. 5i). This study offers a useful guideline for achieving high storage capacity in memory OTFTs in terms of material design and selection.

Yang et al. developed memory OTFTs using wide-bandgap polyphenyl substituted naphthalene-based compounds (TPPs) as the charge-trapping materials.¹⁰⁵ Pentacene OTFTs with pure TPP-H, TPP-CH₃, and TPP-OCH₃ layers, as well as the device with the TPP-OCH₃/polystyrene nanoarray, were fabricated and explored (Fig. 5j). The memory windows of the devices with the pure TPP-OCH₃, TPP-CH₃, and TPP-H layers were 50, 40, and 33 V, respectively. The relatively small HOMO mismatch between TPP-OCH₃ and pentacene, as well as the larger dipole moment and more negative electrostatic potential of TPP-OCH₃ (Fig. 5j), was considered to enhance the hole trapping and result in the largest memory window of the device. Furthermore, the researchers adopted the TPP-OCH₃/polystyrene nanoarray for better device stability and storage capacity. The nanoarray device exhibited a large memory window of 60 V (Fig. 5k), while that of the pure TPP-OCH₃ device was 48 V. For the nanoarray device, the programming operation was performed with the V_G of −100 V, and the erasing operation was performed with light illumination. Compared to the pure-TPP-OCH₃ device, the nanoarray device exhibited a significantly improved memory retention over 10⁴, with the current ON/OFF ratio of 2.8 × 10⁵ (Fig. 5l). The improvements in the memory capacity and stability were attributed to the isolated nanoarray structures and the generation of an interfacial dipole at the pentacene/nanoarray interface. This study provides useful knowledge for enhancing the performance and stability of memory OTFTs in terms of material design and structural optimization.

5.2.3. Exploitation of intramolecular responses. Starting exploration at the molecular level possibly can help open up new possibilities for memory technology. Hu et al. proposed an effective technique for implementing an organic phase-change memory transistor.¹⁰⁶ The researchers synthesized a p-type OSC, 3,6-di(anthracen-2-yl)thieno[3,2-b]thiophene (3,6-DATT), which contains S⋯H hydrogen bonds. Memory OTFTs with 3,6-DATT as the active layer material were fabricated and explored. The 3,6-DATT crystals displayed a reversible molecular conformation transition between the room-temperature (RT) and high-temperature (HT) phases (Fig. 6a). It was found that an electric-field treatment can drive the transition to the HT phase, while UV-light irradiation can induce the transition back to the RT phase. The simulated transfer integral of the RT phase was larger than the HT phase, indicating a larger orbital overlap in the RT phase. In the device tests, after programming (V_G of −90 V for 3 s), the transfer curve of the memory OTFT shifted negatively and the V_th changed from 0 to −32 V (Fig. 6b). After erasing (365 nm light irradiation for 3), it returned to the pristine state. A significant variation in charge transport properties, resulting from the molecular conformation transition, was considered to enable the implementation of the memory function. The memory OTFT also exhibited a retention time exceeding 2 hours (Fig. 6c). This study provides important knowledge for implementing organic phase-change memory transistors in terms of material design.

Fig. 6 (a) The schematic diagrams of the memory OTFT and the RT and HT phases of the 3,6-DATT crystals, (b) the transfer characteristic curves of the device after programming and erasing operations, and (c) the retention characteristic of the device. Reproduced from ref. 106 with permission from [Wiley], copyright [2023]. (d) The light modulation of the transfer characteristic of the photochromic-ferroelectric OTFT for the different ferroelectric polarization states. Reproduced from ref. 107 with permission from [Wiley-VCH Verlag GmbH], copyright [2021].

Carroli et al. developed a multilevel memory technique based on a photochromic-ferroelectric OTFT with 11 bit storage capacity.¹⁰⁷ The researchers fabricated ferroelectric OTFTs with a P(VDF-TrFE) GI and bi-component P3HT/DAE-Me active layer, and analyzed their electrical characteristics. The partial polarization feature of the P(VDF-TrFE) GI allowed for the formation of five distinct current levels in the device. In particular, the open state of the DAE-Me molecules, obtained through UV-light exposure, was used to decrease the device current, while the closed state of the DAE-Me molecules, obtained through green-light exposure, was used to increase the device current back to its initial level. By utilizing the photo-isomerization of the DAE-Me molecules, more than 500 distinct current levels were achieved for each of the five ferroelectric polarization states, thereby yielding 2500 levels in total (>11 bit). As shown in Fig. 6d, they demonstrated the multilevel operation of the device, where the intermediate states for each base level were obtained through UV-light exposure and the erase operation was performed by green-light exposure. This study proposes a technological route for implementing the multilevel operation and provides useful insights into addressing the growing demand for data storage.

5.3. The purposes of interface engineering in sensor OTFTs

Interface engineering has led the progress of sensor OTFT technology, especially in the context of the sensitivity and selectivity properties. Interface engineering has played an essential role for maximizing the efficiency of interactions between the active layer and target analytes, thereby improving the sensitivity. Moreover, implementing functional surfaces for the selective detection of target analytes has been an appealing role of interface engineering for sensor OTFTs as well.

5.3.1. Enhancement of interaction efficiency. Morphological properties of the active layer is one of the critical factors affecting the interplay between target analytes and charge carriers in sensor OTFTs. Jiang et al. investigated the impact of the active-layer thickness on the nitrogen dioxide (NO₂)-sensing property of copper phthalocyanine OTFTs.¹⁰⁸ The device exhibited a remarkable increase in sensitivity as the active-layer thickness was reduced. The reduced thickness and increased grain boundaries of the active layer were considered to facilitate the diffusion of NO₂ molecules, thereby improving the sensing performance. Mun et al. developed a sensor OTFT for detecting ammonia utilizing a nanowire structure.¹⁰⁹ Poly(3-hexylthiophene) (P3HT) sensor OTFTs were fabricated and explored (Fig. 7a). They formed an array of single-crystalline P3HT nanowires as the active layer. In the basic electrical analyses, compared to a reference device with a film-type amorphous P3HT, the nanowire device exhibited a higher mobility. When the nanowire and reference devices were exposed to ammonia, their I_Ds decreased. Especially, the nanowire device showed a larger variation in the I_D according to an increase in the ammonia concentration compared to the reference device (Fig. 7b). In particular, the nanowire device exhibited a more significant variation in the I_D in response to an increase in ammonia concentration compared to the reference device, indicating an enhancement in the sensitivity (Fig. 7b). Furthermore, the nanowire device exhibited excellent reversibility under repeated ammonia exposure (Fig. 7c). These results indicate that it is crucial to engineer the morphological property of active layers for improving the sensitivity of sensor OTFTs.

Fig. 7 (a) The schematic diagram of the interaction between the nanowire sensor OTFT and ammonia molecules, (b) the current variations of the nanowire and reference devices under exposure to ammonia, and (c) the repeatability test of the devices. Reproduced from ref. 109 with permission from [The American Chemical Society], copyright [2017]. (d) The schematic diagram of the porous sensor OTFT (left) and the atomic force microscopy of the active layer surface (right), (e) the variations in the ON current and V_th under exposure to different nitrogen dioxide concentrations, and (f) the selectivity of the trilayer device with different gas species. Reproduced from ref. 110 with permission from [Elsevier Science SA], copyright [2022]. (g) The sensitivity of the UVO-treated sensor OTFT and the reference device for different nitrogen dioxide concentrations, (h) the proposed mechanism for the nitrogen dioxide sensing of the device, and (i) the real-time sensitivity of the device. Reproduced from ref. 111 with permission from [Wiley-VCH Verlag GmbH], copyright [2017]. (j) The grain boundary model for polycrystalline semiconductors with a bias voltage, (k) (left) the variation in the sensitivity of the sensor OTFT according to the grain size and (right) the atomic force microscopy image of the DNTT film with the grain sizes of 200 and 350 nm, and (l) the response of the sensor OTFT to finger tough. Reproduced from ref. 56 with permission from [Nature Portfolio], copyright [2021].

Exploring diverse morphologies in sensor OTFTs has been required for enhancing their sensing performance. Gao et al. developed a sensor OTFT with remarkably high sensitivity to NO₂ based on a multilayer porous structure.¹¹⁰ They fabricated a multilayer porous P3HT film, which was used as the active layer of the sensor OTFT (Fig. 7d). When the multilayer porous OTFTs were exposed to NO₂, the ON current (I_ON) increased and the V_th shifted in the positive direction with increasing the NO₂ concentration. Specifically, the trilayer porous OTFT exhibited the greatly enhanced I_ON responsivity of 1053%, while a reference device with a dense P3HT film exhibited the I_ON responsivity of 122% (Fig. 7e). The V_th responsivity of the trilayer porous OTFT was 128%, while that of the reference device was 42% (Fig. 7e). In particular, the sensitivity calculations revealed that the trilayer porous OTFT had higher sensitivity than the bilayer and monolayer porous OTFTs. For the trilayer device, the increased adsorption sites and continuous diffusion pathways were considered to facilitate the analyte-induced generation of charge carriers. Furthermore, the researchers investigated the selectivity of the multilayer porous OTFTs. For comparison, the trilayer OTFT was exposed to one oxidizing gas, i.e., SO₂ and two reducing gases, i.e., NH₃ and H₂S. Consequently, the device demonstrated higher sensitivity to NO₂ compared to the other examined gases (Fig. 7f). It was also noted that the sensors can operate under high humidity conditions of 70% RH at room temperature. This study provides a useful technological foundation for designing the morphology of the active layer in OTFTs.

Not only structural approaches but also chemical modulation of the constituent layers can offer an effective route to enhance the sensing performance of OTFTs. Huang et al. developed a sensor OTFT technique for highly sensitive detection of NO₂ based on interfacial modification.¹¹¹ Sensor OTFTs with a CuPc active layer were fabricated and explored. They performed an UV-ozone (UVO) treatment on the polystyrene layer of the GI. The UVO-treated device exhibited significantly enhanced NO₂ sensitivity compared to a reference device without UVO treatment (Fig. 7g). When the NO₂ concentration increased, significantly larger variations in the ON current and turn-on voltage were observed for the UVO-treated device. The morphological analyses on the OSC and GI revealed no significant correlation between their morphologies and the enhanced sensitivity. Oxygenated polar functionalities on the UVO-treated polystyrene surface were considered to physically adsorb NO₂ molecules, followed by the polarization effect-induced positive charge generation in the OSC layer (Fig. 7h). X-ray photoelectron spectroscopy and Fourier transform infrared spectroscopy were performed on the polystyrene surfaces. The chemical analyses on the UVO-treated polystyrene layer revealed the formation of new polar groups on the polystyrene surface and the possibility of physical adsorption of NO₂ molecules. Furthermore, the real-time sensitivity tests showed that the sensitivity of the UVO-treated device for various NO₂ concentrations greatly increased with increasing the time of UVO treatment on the polystyrene layer (Fig. 7i). These results indicate that modulating the chemical properties of the OSC–GI interface can lead to a significant increase in the sensing performance.

Huang et al. demonstrated an effective sensor OTFT for detecting temperature through potential barrier engineering.⁵⁶ They fabricated OTFTs with DNTT as the active layer material. The potential barrier engineering for implementing the temperature sensor was performed based on the following equation:⁵⁶

where J is the current density across a grain boundary in polycrystalline semiconductors, E_V is the HOMO level without bending, E_B is the barrier height at the grain boundary, and V_B is the voltage drop across the grain boundary (Fig. 7j). The researchers discovered that when the effective barrier height E_Be (E_Be = E_B – qV_B) is maximized at l ≈ 2l_D (l: grain size, l_D: Debye length), the charge transport in the active layer becomes strongly dependent on temperature, i.e., highly thermosensitive. The sensor OTFT with the grain size of ≈350 nm exhibited a high sensitivity of 155 in the off-state, while those with smaller and larger grains were relatively thermostable (Fig. 7k). In addition, the sensor OTFT was demonstrated to identify human touch (Fig. 7l). This study provides an elaborate methodology and useful knowledge for developing effective temperature sensors based on OTFTs.

5.3.2. Implementation of target recognition. To develop effective sensors, recognition of target analytes has been achieved by employing multidimensional techniques on OTFT platforms. Mulla et al. developed a sensor OTFT for the selective detection of streptavidin. Electrolyte-gated OTFTs with a PBTTT-C16 active layer were fabricated and explored.¹¹² A biotinylated phospholipid (B-PL) bilayer was formed on the active layer of the device (Fig. 8a), which had a pre-formed UV-crosslinked poly(acrylic acid) (PAA) layer with carboxyl functional groups, enabling selective streptavidin detection. The scanning electron microscopy showed that the PAA layer provided a compact and smooth surface on the active layer. The carboxyl groups were used as anchoring sites for the B-PL molecules. Moreover, the researchers emphasized the critical role of UV crosslinking the PAA layer, as it enables the device to operate effectively in aqueous electrolytes. The device effectively operated as a sensor when exposed to streptavidin. Specifically, the sensor OTFT exhibited an improved detection limit, as indicated by the relative current response plotted against the streptavidin concentration in the range of 0.01–1.6 μM (Fig. 8b). Furthermore, the researchers examined the sensing capability of the phospholipid layer without biotin. As a result, the device constructed with the phospholipid layer without biotin did not show any proper response to streptavidin (Fig. 8c). These results confirm the effectiveness of adopting B-PL bilayers for the selective detection of streptavidin.

Fig. 8 (a) The schematic diagram of the sensor OTFT with the anchored biotinylated phospholipids, (b) the current variations of the sensor OTFT under exposure to the different streptavidin concentration, and (c) the response of the device with the phospholipid layer without biotin to streptavidin. Reproduced from ref. 112 with permission from [The Royal Society of Chemistry], copyright [2015]. (d) The proposed sensing mechanism of the sensor OTFT with the graphene oxide, (e) the variation in the transfer characteristic curve of the device by the immobilization of poly-A DNA, and by the hybridization of poly-T DNA, and (f) the variation in the transfer characteristic curve by the SkBr3 attachment. Reproduced from ref. 113 with permission from [The Royal Society of Chemistry], copyright [2017]. (g) The schematic diagram of the formed enzyme-containing molecular antennas on the active layer in the sensor OTFT, (h) the selectivity tests of the device with various analytes, and (i) the variations in the V_th and mobility of the device under exposure to adenosine triphosphate. Reproduced from ref. 114 with permission from [The Royal Society of Chemistry], copyright [2018].

Finding and investigating the sensing functionality of various recognition elements in sensor OTFTs has been instrumental in the realization of specific analyte detection. Lee et al. proposed a sensor OTFT technology for the selective detection of DNA and circulating tumor cells (CTC).¹¹³ Sensor OTFTs with a pentacene active layer were fabricated and explored. In particular, they formed a functionalized graphene oxide (GO) layer with on the pentacene active layer (Fig. 8d). It was mentioned that the GO seeped into the pentacene grain boundaries and formed π–π bonding. The devices with and without the GO layer exhibited a comparable charge transport property. The reference device without the GO layer displayed no significant variation in the mobility by the exposure to DNA molecules. In contrast, the mobility of the GO-incorporated device decreased after the immobilization of poly-A DNA; specifically from 0.097 to 0.063 cm² V⁻¹ s⁻¹ (Fig. 8e). Moreover, after the hybridization of poly-T DNA, the mobility further decreased to 0.044 cm² V⁻¹ s⁻¹ (Fig. 8e). The negative charge on the DNA molecules was considered to attract holes at the pentacene grain boundaries, thereby hindering the charge transport at the OSC–GI interface. In addition, the GO-incorporated device also exhibited lowered mobility when exposed to SkBr3 CTC; specifically the SkBr3 attachment led to a significant 95% reduction in the mobility (Fig. 8f). Through the fluorescence image analyses, the researchers confirmed the antigen–antibody interaction using the SkBr3 cells. This study contributed to confirming the effectiveness of the use of proper recognition elements in the selective detection of target analytes.

The progress of sensor OTFT technology has been accompanied by the development of sophisticated surface modulation techniques. Shen et al. suggested a sensor OTFT for the selective adenosine triphosphate (ATP) detection based on a molecular antenna.¹¹⁴ Sensor OTFTs with a PDPP3T active layer were fabricated and explored. Especially, they incorporated enzyme-containing molecular antennas on the surface of the active layer (Fig. 8g). The process for fabricating the molecular antennas included the formation of surface binding groups. In the electrical tests under exposure to ATP, the current of the molecular antenna device increased with the increasing ATP concentration. The detection limit was found to be 0.1 nM. The device exhibited a good reproducibility property as well. Furthermore, the researchers investigated the selectivity using other materials, i.e., adenosine diphosphate (ADP) and adenosine monophosphate (AMP) (Fig. 8h). The molecular antenna device exhibited a large variation in the current (196.98%), while under exposure to the ADP and AMP (Fig. 8h), exhibiting only 19.28% and 0.32% variations, respectively. They observed a reduction in the V_th magnitude, i.e., 0.45 V and an increase in the mobility, i.e., from 0.13 to 0.19 cm² V⁻¹ s⁻¹ (Fig. 8i). Accordingly, the exposure to ATM was considered to result in variations in the concentration of charge carrier and the mobility. This study provided an effective technological guideline for implementing sensor OTFTs with high selectivity.

6. Summary and perspectives

This review underlined the diverse technological streams of interface engineering formed in the field of OTFTs. It was necessary to categorize the previous research based on the purposes and roles of interface engineering as follows: in Section 5, 5.1. The purposes of interface engineering in conventional OTFTs with ‘5.1.1. Suppression of molecular disorder’, ‘5.1.2. Enhancement of contact properties’, and ‘5.1.3. Inhibition of trap-state formation’, 5.2. The purposes of interface engineering in memory OTFTs with ‘5.2.1. Stabilization of non-equilibrium polarization’, ‘5.2.2. Enhancement of non-equilibrium charge trapping’, and ‘5.2.3. Exploitation of intramolecular responses’, and lastly, 5.3. The purposes of interface engineering in sensor OTFTs with ‘5.3.1. Enhancement of interaction efficiency’ and ‘5.3.2. Implementation of target recognition’. It is worth noting that the purpose and roles of interface engineering described in all these sections exhibit a deep interconnectedness on a physical level, while at the same time, there are distinct differences in the OTFT functionality pursued by interface engineering.

Interestingly, interface engineering takes on different forms and characters depending on the specific functionality of OTFT applications. For example, one key aspect of interface engineering for conventional OTFTs has been suppressing interactions with the environment, while for sensor OTFTs, it has been specialized in exploiting interactions with the environmental elements in a sophisticated manner. Although OTFT devices consist solely of two primary interfaces, i.e., the OSC–GI and OSC–SD interfaces, the charge-carrier dynamics at these interfaces are dependent on multiple driving factors with complex causality and correlations. The categorization of interface engineering based on its purpose and role is believed to deepen our understanding of how variations in these complex factors can lead to subtle or dramatic changes in the device characteristics.

In the future, a more sophisticated form of interface engineering with accumulated knowledge will play a crucial role in the development of OTFT technology. The accumulated knowledge indicate both theoretical and experimental aspects. We consider that crossover of technologies and knowledge between different subfields will lead to emergence of new phenomena or functions, as well as the upgrade of existing OTFT technologies. The combination of various heterogeneous materials will possibly be one important aspect in the development of OTFT technology.^35,115,116 The purpose and role of interface engineering in OTFTs are variable and dynamic. The attempts to endow certain functionality or better characteristics to OTFTs through interface engineering are actively ongoing even now. Through the development of individual techniques and their convergence, optimal or new forms of interface engineering can emerge at any time, leading to noteworthy progress in OTFT technology.

Conflicts of interest

The authors declare no conflict of interest.

Acknowledgements

This work was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (2021R1A6A3A01088549), by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (2018R1A6A1A03026005), and by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (2021R1A2C1011429).

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