Ultrahigh performance negative thermal-resistance switching based on individual ZnO:K, Cl micro/nanowires for multibit nonvolatile resistance random access memory dual-written/erased repeatedly by temperature or bias

Abstract

Currently, nanostructure-based random access memories (RAMs) mainly focus on the writing of data by electricity. Herein, nonvolatile multibit thermalresistive RAMs (TRAMs), which can be dual-written/erased by different temperatures or drain–source biases, are realized successfully in two-terminal devices based on individual ZnO:K, Cl micro/nanowires. The mechanism of emptying and filling trap states is proposed for the explanation of temperature and bias controlled multibit information writing and erasing. The incorporation of KCl into ZnO lattice creates abundant defects, which can serve as trap centers and store charges. At relatively high temperatures, the trapped charges can escape under a low operation voltage, resulting in a downshift of ZnO Fermi level. Moreover, the depth of the emptied trap is dependent on loaded temperature, and therefore a tunable high resistance state can be obtained. Subsequently, at relatively high bias, electrons can be injected into trap states under a low operation temperature, and the depth of the filled trap depends on applied voltage. A tunable low resistance state can therefore be acquired due to an upshift of ZnO Fermi level. It is as a result of the thermal excitation and electric field injection induced emptying and filling of trap states that multibit information can effectively be dual-written/erased by different temperatures or biases. The results indicate that the modulation of trap states by impurity introduction in nanostructures gives direction to the development of novel nanodevices in rewritable nonvolatile temperature and bias information sensors and memory.